[PATCH] S/390: shifts and setmems with implicit ANDs
Andreas Krebbel
krebbel1@de.ibm.com
Wed Aug 17 09:08:00 GMT 2005
On Tue, Aug 16, 2005 at 01:58:12PM -0700, Richard Henderson wrote:
> On Fri, Aug 12, 2005 at 12:30:12PM +0200, Andreas Krebbel wrote:
> > shift instructions on s390 only use the 6 least significant bits
> > of the shift count operand. Hence we can skip pointless ANDs. After
> > an unsuccessful try using TARGET_SHIFT_TRUNCATION_MASK I've modified
> > the shift_count_operand predicate and the print_shift_count_operand
> > function to omit ANDs with constants which have set these 6 bits.
>
> Um, I think you'll find you have reload problems here. We've tried
> this before on mips and x86 to deal with sign-extend and float-extend
> operators respectively.
I've bootstrapped with this patch and have run the testsuite without new
failures. Do you remember a particular testcase which triggered the reload
problem?
> IMO the only thing to do is to move TARGET_SHIFT_TRUNCATION_MASK usage
> into the combiner, etc, and replace use of SHIFT_COUNT_TRUNCATED.
In a long term view drawing TARGET_SHIFT_TRUNCATION_MASK into account
wherever shifts are emitted is certainly the better - because
platform independent - solution. But as a quick solution the current
patch seemed easy enough to stay until combine and co are fixed.
> > Almost the same applies to the padding byte operand of mvcle which is
> > always truncated to the 8 least significant bits.
>
> Here you'd just have to use multiple patterns, iiuc.
That would be a pity.
Because we have a whole bunch of shift patterns we would need to duplicate
a lot of code for a very small performance improvement.
Bye,
-Andreas-
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