PR rtl-optimization/15248 -- semi-latent reload bug

[Roger Sayle]

On Wed, 20 Apr 2005, Jeffrey A Law wrote:
> As mentioned in the PR, when we create equivalences between a pseudo
> and read-only memory we run the risk of emitting an instruction which
> attempts to store into the read-only memory location.  That is clearly
> bad since storing into a read-only memory location will typically
> generate a segfault.
>
> I pondered trying to remove the offending assignments, but came to the
> conclusion that it could not easily be done, largely because new
> offending assignments can emerge as a result of spilling.


Hi Jeff (and Eric),

Perhaps you can clear up a confusion of mine that I've had since
we first ran into this spilling to read-only memory issue, a while
back.

Isn't it a good thing to equivalence a register to a read-only memory
address?  My (perhaps misguided) understanding is that if we equivalence
a pseudo to such a memory address, then that pseudo always holds the
equivalenced memory value.  As the value in read-only memory can never
change, this makes spilling that pseudo relatively cheap.  i.e. the
register never has to be written to memory, only re-read.  For example,
if a pseudo only ever holds the value of a constant pool entry, when
register pressure gets to high, the spill can be rematerialized without
previously writing it to memory.

Perhaps I'm getting the issues confused, and this bug/fix involves a
different problem.  However, in reload spilling constants and read-only
memory should be prioritized over other classes of spill.

Roger
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