SuperH patches against 3.2 20020529 18:00 - 'catalonia' patches

Joern Rennecke joern.rennecke@superh.com
Mon Sep 20 17:58:00 GMT 2004


--- ChangeLog.SuperH@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Thu Jul  8 14:59:46 2004
+++ ChangeLog.SuperH	Tue Aug 17 16:45:40 2004
@@ -1,3 +1,123 @@
+2004-08-17  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* sh-protos.h (sh_contains_memref_p): Declare.
+	* sh.c (sh_contains_memref_p_1, sh_contains_memref_p): New functions.
+	* sh.md (zero_extendhidi2, zero_extendqidi2, zero_extendhisi2_media):
+	Set highpart attribute to "user" if there is a memory reference.
+	(zero_extendqisi2_media, extendsidi2, extendhidi2): Likewise.
+	(extendqidi2, extendhisi2_media, extendqisi2_media): Likewise.
+	(truncdisi2, truncdihi2, truncdiqi2, movsi_media): Likewise.
+	(movsi_media_nofpu, movqi_media, movhi_media, movsf_media): Likewise.
+	(movsf_media_nofpu, movv2hi_i): Likewise.
+
+2004-08-13  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* sh.c (function_symbol): Return target after copying sym to target.
+
+	Call emit_insn  with result from gen_symGOT2reg.
+
+2004-08-11  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* cse.c (basic-block.h): #include.
+	(trivially_dead_nonlocal_regs): New variable.
+	(note_dead_set): New function.
+	(delete_trivially_dead_insns): If life info is available, update it.
+
+2004-08-11  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* sh.md (muldi3): Use left shift on lower part of mmul.l result.
+
+2004-08-09  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* config/sh/lib1funcs.asm (div_table): Provide separate copies
+	for local use (in text section), and for exporting (in rodata
+	section).
+
+2004-08-09  J"orn Rennecke <joern.rennecke@superh.com>
+
+	Backport from SH5GCC-3.4-int:
+	* loop.c (loop_invariant_p): Before using regs_array[REGNO (x)],
+	check that it is valid.
+	(guard_widened_biv): Use mark_user_reg on new_check_val.
+
+2004-08-04  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* late-loop.c (tr_def_s): New member own_end;
+	(add_tr_to_live_range): Add second parameter.  Changed caller.
+	(clear_tr_from_live_range): Clear trs_live_at_end bit
+	for the register its definition basic block if own_end is set.
+	(augment_live_range): Also take trs_live_at_end into account.
+	(combine_tr_defs): Don't bother with other_def->other_tr_uses_after_use
+	if it pertains to a different register.
+	(move_tr_def): Set def->other_tr_uses_before_def after
+	calling combine_tr_defs.
+
+2004-07-30  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* sh.c (function_symbol): Change mode of result from gen_sym2PIC
+	to Pmode.
+	* config/sh/libgcc-std.ver: Document issue with __ic_invalidate.
+	* config/sh/lib1funcs.asm (HIDDEN_FUNC): Define.
+	(sdivsi3_i4, sdivsi3_2, udivsi3_i4, udivsi3, ic_invalidate): Use it.
+	(GCC_shcompact_return_trampoline): Likewise.
+
+2004-07-29  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* lib1funcs.asm (sdivsi3, sdivsi3_2, div_table): Set types and sizes
+	properly.  Provide special -fpic / -fPIC - safe version.
+
+	Backport from fsf 3.5: build & use libgcc_s.so:
+	* config.gcc (sh64-superh-linux): Use t-slibgcc-elf-ver and t-linux.
+	* config/sh/t-linux64 (SHLIB_MAPFILES, SHLIB_LINK, SHLIB_INSTALL): Set.
+	* config/sh/libgcc-std.ver: New file (removed parts not pertinent to
+	gcc 3.2).
+
+	Fix use of intrinsic functions when using -fpic / -fPIC:
+	* sh-protos.h (sh_function_kind): New enum.
+	(function_symbol): Declare.
+	* sh.c (function_symbol): New function.
+	* sh.md (udivsi3, divsi_inv_call_icombine, divsi3, ic_invalidate_line):
+	Use function_symbol to get the right kind of function address constant.
+	(call, call_pop, call_value, sibcall, call_value_pop): Likewise.
+	(shcompact_return_tramp): Likewise.
+	* config/sh/libgcc-std.ver (__mulsi): Comment out.
+	(__sdivsi3, __div_table, __GCC_shcompact_call_trampoline): Add.
+	(__GCC_shcompact_incoming_args, __GCC_push_shmedia_regs): Add.
+	(__GCC_push_shmedia_regs_nofpu, __GCC_pop_shmedia_regs): Add.
+	(__GCC_pop_shmedia_regs_nofpu): Add.
+
+	* sh.h (sh_div_strategy, sh_multcost_str, sh_div_str): Make extern.
+
+2004-07-13  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* unroll.c (copy_loop_body): Don't copy copy_end again if
+	it is the same as copy_notes_from.  */
+
+2004-07-08  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* sh.md (divsi_inv_m2): Fix initialization of scratch0.
+
+2004-07-08  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* sh.c (shift_count_operand): Don't allow out-of-range constant
+	shift counts.
+
+2004-07-08  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* ifcvt.c (dead_or_predicable): Before calling propagate_block,
+	call allocate_reg_info if necessary.
+
+2004-07-08  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* sh.md (muldi3): Remove SIGN_EXTENDs from operands to V2SI subregs.
+	* sh.c (arith_reg_operand): Allow no-op sign extensions more
+	consistently.
+
+2004-07-08  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* ifcvt.c (noce_try_complex_cmove): When deleting the then block,
+	also delete any trailing barrier.
+
 2004-07-02  J"orn Rennecke <joern.rennecke@superh.com>
 
 	Backport from 3.4 integration branch (SH5GCC-3.4-int):
--- config/sh/sh.h@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Fri Jul 23 12:07:40 2004
+++ config/sh/sh.h	Thu Jul 29 17:33:27 2004
@@ -464,7 +464,9 @@ enum sh_divide_strategy_e {
   SH_DIV_INV_CALL,
   SH_DIV_INV_CALL2,
   SH_DIV_INV_FP
-} sh_div_strategy;
+};
+
+extern enum sh_divide_strategy_e sh_div_strategy;
 
 #define OVERRIDE_OPTIONS 						\
 do {									\
@@ -3636,7 +3638,7 @@ extern struct rtx_def *fpscr_rtx;
 
 #define SIMULTANEOUS_PREFETCHES 2
 
-const char *sh_multcost_str;
-const char *sh_div_str;
+extern const char *sh_multcost_str;
+extern const char *sh_div_str;
 
 #endif /* ! GCC_SH_H */
--- config/sh/sh.c@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Thu Jul  8 15:16:33 2004
+++ config/sh/sh.c	Tue Aug 17 16:45:38 2004
@@ -6432,14 +6432,27 @@ arith_reg_operand (op, mode)
 	      && regno != MACH_REG && regno != MACL_REG);
     }
   /* Allow a no-op sign extension - compare LOAD_EXTEND_OP.
-     We allow SImode here as not using an FP register is just a matter of
-     proper register allocation here.  */
+     We allow SImode here, as not using an FP register is just a matter of
+     proper register allocation.  */
   if (GET_MODE (op) == DImode && GET_CODE (op) == SIGN_EXTEND
       && GET_MODE_BITSIZE (GET_MODE (XEXP (op, 0))) <= 32
       && (GET_MODE (XEXP (op, 0)) == SImode
 	  || GET_MODE (XEXP (op, 0)) == HImode)
       && GET_CODE (XEXP (op, 0)) != SUBREG)
     return register_operand (XEXP (op, 0), VOIDmode);
+  if (GET_MODE (op) == SImode && GET_CODE (op) == SIGN_EXTEND
+      && GET_MODE (XEXP (op, 0)) == HImode
+      && GET_CODE (XEXP (op, 0)) == REG
+      && REGNO (XEXP (op, 0)) <= LAST_GENERAL_REG)
+    return register_operand (XEXP (op, 0), VOIDmode);
+  if (GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_INT
+      && GET_CODE (op) == SUBREG
+      && GET_MODE (SUBREG_REG (op)) == DImode
+      && GET_MODE_BITSIZE (GET_MODE (XEXP (SUBREG_REG (op), 0))) <= 32
+      && (GET_MODE (XEXP (SUBREG_REG (op), 0)) == SImode
+          || GET_MODE (XEXP (SUBREG_REG (op), 0)) == HImode)
+      && GET_CODE (XEXP (SUBREG_REG (op), 0)) != SUBREG)
+    return register_operand (XEXP (SUBREG_REG (op), 0), VOIDmode);
   return 0;
 }
 
@@ -8836,10 +8849,45 @@ int
 shift_count_operand (rtx op, enum machine_mode mode)
 {
   return (CONSTANT_P (op)
-	  ? nonmemory_operand (op, mode)
+	  ? (GET_CODE (op) == CONST_INT
+	     ? (unsigned) INTVAL (op) < GET_MODE_BITSIZE (mode)
+	     : nonmemory_operand (op, mode))
 	  : shift_count_reg_operand (op, mode));
 }
 
+rtx
+function_symbol (rtx target, const char *name, enum sh_function_kind kind)
+{
+  rtx sym = gen_rtx_SYMBOL_REF (Pmode, name);
+#if 0 /* not in 3.2  */
+  SYMBOL_REF_FLAGS (sym) = SYMBOL_FLAG_FUNCTION;
+#endif
+  if (flag_pic)
+    switch (kind)
+      {
+      case FUNCTION_ORDINARY:
+	break;
+      case SFUNC_GOT:
+	{
+	  rtx reg = target ? target : gen_reg_rtx (Pmode);
+
+	  emit_insn (gen_symGOT2reg (reg, sym));
+	  sym = reg;
+	  break;
+	}
+      case SFUNC_STATIC:
+	sym = gen_sym2PIC (sym);
+	PUT_MODE (sym, Pmode);
+	break;
+      }
+  if (target && sym != target)
+    {
+      emit_move_insn (target, sym);
+      return target;
+    }
+  return sym;
+}
+
 /* Find the number of a general purpose register in S.  */
 static int
 scavenge_reg (HARD_REG_SET *s)
@@ -9285,6 +9333,25 @@ sh_gen_truncate (enum machine_mode mode,
   return gen_rtx_fmt_e (code, mode, x);
 }
 
+/* Load and store depend on the highpart of the address.  However,
+   set_attr_alternative does not give well-defined results before reload,
+   so we must look at the rtl ourselves to see if any of the feeding
+   registers is used in a memref.  */
+
+/* Called by sh_contains_memref_p via for_each_rtx.  */
+static int
+sh_contains_memref_p_1 (rtx *loc, void *data ATTRIBUTE_UNUSED)
+{
+  return (GET_CODE (*loc) == MEM);
+}
+
+/* Return non-zero iff INSN contains a MEM.  */
+int
+sh_contains_memref_p (rtx insn)
+{
+  return for_each_rtx (&PATTERN (insn), &sh_contains_memref_p_1, NULL);
+}
+
 const char *sh_multcost_str = "";
 const char *sh_div_str = "";
 enum sh_divide_strategy_e sh_div_strategy = SH_DIV_CALL;
--- config/sh/sh.md@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Thu Jul  8 15:41:00 2004
+++ config/sh/sh.md	Tue Aug 17 16:45:39 2004
@@ -1810,8 +1810,7 @@ (define_expand "udivsi3"
   /* Emit the move of the address to a pseudo outside of the libcall.  */
   if (TARGET_HARD_SH4 && TARGET_SH3E)
     {
-      emit_move_insn (operands[3],
-		      gen_rtx_SYMBOL_REF (SImode, \"__udivsi3_i4\"));
+      function_symbol (operands[3], \"__udivsi3_i4\", SFUNC_STATIC);
       if (TARGET_FPU_SINGLE)
 	last = gen_udivsi3_i4_single (operands[0], operands[3]);
       else
@@ -1826,11 +1825,9 @@ (define_expand "udivsi3"
     }
   else if (TARGET_SH5)
     {
-      emit_move_insn (operands[3],
-		      gen_rtx_SYMBOL_REF (Pmode,
-					  (TARGET_FPU_ANY
-					   ? \"__udivsi3_i4\"
-					   : \"__udivsi3\")));
+      function_symbol (operands[3],
+		       (TARGET_FPU_ANY ? \"__udivsi3_i4\" : \"__udivsi3\"),
+		       SFUNC_STATIC);
 
       if (TARGET_SHMEDIA)
 	last = gen_udivsi3_i1_media (operands[0], operands[3]);
@@ -1841,8 +1838,7 @@ (define_expand "udivsi3"
     }
   else
     {
-      emit_move_insn (operands[3],
-		      gen_rtx_SYMBOL_REF (SImode, \"__udivsi3\"));
+      function_symbol (operands[3], \"__udivsi3\", SFUNC_STATIC);
       last = gen_udivsi3_i1 (operands[0], operands[3]);
     }
   first = emit_move_insn (gen_rtx_REG (SImode, 4), operands[1]);
@@ -1958,6 +1954,7 @@ (define_insn_and_split "*divsi_inv_call_
   "
 {
   const char *name = \"__sdivsi3\";
+  enum sh_function_kind kind = SFUNC_GOT;
   rtx sym;
 
   emit_move_insn (gen_rtx_REG (SImode, R4_REG), operands[1]);
@@ -1970,10 +1967,11 @@ (define_insn_and_split "*divsi_inv_call_
 	break;
       x = XVECEXP (x, 0, 0);
       name = \"__sdivsi3_2\";
+      kind = SFUNC_STATIC;
       emit_move_insn (gen_rtx_REG (DImode, R20_REG), x);
       break;
     }
-  sym = gen_rtx_SYMBOL_REF (Pmode, (name));
+  sym = function_symbol (NULL, name, kind);
   emit_insn (gen_divsi3_media_2 (operands[0], sym));
   DONE;
 }"
@@ -2042,8 +2040,7 @@ (define_expand "divsi3"
   /* Emit the move of the address to a pseudo outside of the libcall.  */
   if (TARGET_HARD_SH4 && TARGET_SH3E)
     {
-      emit_move_insn (operands[3],
-		      gen_rtx_SYMBOL_REF (SImode, \"__sdivsi3_i4\"));
+      function_symbol (operands[3], \"__sdivsi3_i4\", SFUNC_STATIC);
       if (TARGET_FPU_SINGLE)
 	last = gen_divsi3_i4_single (operands[0], operands[3]);
       else
@@ -2135,13 +2132,12 @@ (define_expand "divsi3"
 	  tab_base = gen_datalabel_ref (tab_base);
 	  emit_move_insn (gen_rtx_REG (Pmode, R20_REG), tab_base);
 	}
-      emit_move_insn (operands[3],
-		      gen_rtx_SYMBOL_REF (Pmode,
-					  (TARGET_FPU_ANY && TARGET_SH1
-					   ? \"__sdivsi3_i4\"
-					   : TARGET_DIVIDE_CALL2
-					   ? \"__sdivsi3_2\"
-					   : \"__sdivsi3\")));
+      if (TARGET_FPU_ANY && TARGET_SH1)
+	function_symbol (operands[3], \"__sdivsi3_i4\", SFUNC_STATIC);
+      else if (TARGET_DIVIDE_CALL2)
+	function_symbol (operands[3], \"__sdivsi3_2\", SFUNC_STATIC);
+      else
+	function_symbol (operands[3], \"__sdivsi3\", SFUNC_GOT);
 
       if (TARGET_SHMEDIA)
 	last = ((TARGET_DIVIDE_CALL2 ? gen_divsi3_media_2 : gen_divsi3_i1_media)
@@ -2153,7 +2149,7 @@ (define_expand "divsi3"
     }
   else
     {
-      emit_move_insn (operands[3], gen_rtx_SYMBOL_REF (SImode, \"__sdivsi3\"));
+      function_symbol (operands[3], \"__sdivsi3\", SFUNC_GOT);
       last = gen_divsi3_i1 (operands[0], operands[3]);
     }
   first = emit_move_insn (gen_rtx_REG (SImode, 4), operands[1]);
@@ -2284,7 +2280,7 @@ (define_insn_and_split "divsi_inv_m2"
   rtx norm32 = operands[1];
   rtx inv1 = operands[2];
   rtx i92 = operands[3];
-  rtx scratch0 = operands[5];
+  rtx scratch0 = operands[4];
   rtx scratch0_si = simplify_gen_subreg (SImode, scratch0, DImode, 0);
 
   emit_insn (gen_mulsidi3_media (scratch0, inv1, norm32));
@@ -2978,15 +2974,29 @@ (define_insn_and_split "muldi3"
   [(const_int 0)]
   "
 {
-  rtx op3_v2si = simplify_gen_subreg (V2SImode, operands[3], DImode, 0);
-  rtx op2_v2si = simplify_gen_subreg (V2SImode, operands[2], DImode, 0);
+  rtx op3_v2si, op2_v2si;
+
+  op3_v2si = operands[3];
+  if (GET_CODE (op3_v2si) == SIGN_EXTEND)
+    {
+      op3_v2si = XEXP (op3_v2si, 0);
+      op3_v2si = simplify_gen_subreg (DImode, op3_v2si, GET_MODE (op3_v2si), 0);
+    }
+  op3_v2si = simplify_gen_subreg (V2SImode, op3_v2si, DImode, 0);
+  op2_v2si = operands[2];
+  if (GET_CODE (op2_v2si) == SIGN_EXTEND)
+    {
+      op2_v2si = XEXP (op2_v2si, 0);
+      op2_v2si = simplify_gen_subreg (DImode, op2_v2si, GET_MODE (op2_v2si), 0);
+    }
+  op2_v2si = simplify_gen_subreg (V2SImode, op2_v2si, DImode, 0);
   emit_insn (gen_rotldi3 (operands[3], operands[1], GEN_INT (32)));
   emit_insn (gen_mulv2si3 (op3_v2si, op3_v2si, op2_v2si));
   emit_insn (gen_umulsidi3_media (operands[4],
 			         sh_gen_truncate (SImode, operands[1], 0),
 			         sh_gen_truncate (SImode, operands[2], 0)));
   emit_insn (gen_anddi3 (operands[0], operands[3], GEN_INT (0xffffffff00000000LL)));
-  emit_insn (gen_lshrdi3_media (operands[3], operands[3], GEN_INT (32)));
+  emit_insn (gen_ashldi3_media (operands[3], operands[3], GEN_INT (32)));
   emit_insn (gen_adddi3 (operands[0], operands[3], operands[0]));
   emit_insn (gen_adddi3 (operands[0], operands[4], operands[0]));
   DONE;
@@ -4232,7 +4242,10 @@ (define_insn "zero_extendhidi2"
 	#
 	ld%M1.uw	%m1, %0"
   [(set_attr "type" "*,load_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_split
   [(set (match_operand:DI 0 "register_operand" "=r")
@@ -4265,7 +4278,10 @@ (define_insn "zero_extendqidi2"
 	andi	%1, 255, %0
 	ld%M1.ub	%m1, %0"
   [(set_attr "type" "arith_media,load_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_expand "zero_extendhisi2"
   [(set (match_operand:SI 0 "arith_reg_operand" "")
@@ -4292,7 +4308,10 @@ (define_insn "*zero_extendhisi2_media"
 	#
 	ld%M1.uw	%m1, %0"
   [(set_attr "type" "arith_media,load_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_split
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -4331,7 +4350,10 @@ (define_insn "*zero_extendqisi2_media"
 	andi	%1, 255, %0
 	ld%M1.ub	%m1, %0"
   [(set_attr "type" "arith_media,load_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_insn "zero_extendqihi2"
   [(set (match_operand:HI 0 "arith_reg_operand" "=r")
@@ -4357,7 +4379,10 @@ (define_insn "extendsidi2"
 	ld%M1.l	%m1, %0
 	fmov.sl	%1, %0"
   [(set_attr "type" "arith_media,load_media,fpconv_media")
-   (set_attr "highpart" "extend")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "extend")))])
 
 (define_insn "extendhidi2"
   [(set (match_operand:DI 0 "register_operand" "=r,r")
@@ -4367,7 +4392,10 @@ (define_insn "extendhidi2"
 	#
 	ld%M1.w	%m1, %0"
   [(set_attr "type" "*,load_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_split
   [(set (match_operand:DI 0 "register_operand" "=r")
@@ -4389,7 +4417,10 @@ (define_insn "extendqidi2"
 	#
 	ld%M1.b	%m1, %0"
   [(set_attr "type" "*,load_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_split
   [(set (match_operand:DI 0 "register_operand" "=r")
@@ -4426,7 +4457,10 @@ (define_insn "*extendhisi2_media"
 	#
 	ld%M1.w	%m1, %0"
   [(set_attr "type" "arith_media,load_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_split
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -4463,7 +4497,10 @@ (define_insn "*extendqisi2_media"
 	#
 	ld%M1.b	%m1, %0"
   [(set_attr "type" "arith_media,load_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_split
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -4502,7 +4539,10 @@ (define_insn "truncdisi2"
 	fmov.sl	%T1, %0
 	fmov.s	%T1, %0"
   [(set_attr "type"   "arith_media,store_media,fstore_media,fload_media,fpconv_media,fmove_media")
-   (set_attr "highpart" "extend")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "extend")))])
 
 (define_insn "truncdihi2"
   [(set (match_operand:HI 0 "general_movdst_operand" "=?r,m")
@@ -4513,7 +4553,10 @@ (define_insn "truncdihi2"
 	st%M0.w	%m0, %1"
   [(set_attr "type"   "arith_media,store_media")
    (set_attr "length" "8,4")
-   (set_attr "highpart" "extend")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "extend")))])
 
 (define_insn "truncdiqi2"
   [(set (match_operand:QI 0 "general_movdst_operand" "=r,m")
@@ -4523,7 +4566,10 @@ (define_insn "truncdiqi2"
 	andi	%1, 255, %0
 	st%M0.b	%m0, %1"
   [(set_attr "type"   "arith_media,store")
-   (set_attr "highpart" "extend")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "extend")))])
 
 ;; -------------------------------------------------------------------------
 ;; Move instructions
@@ -4741,7 +4787,10 @@ (define_insn "*movsi_media"
 	pt	%1, %0"
   [(set_attr "type"   "arith_media,arith_media,*,load_media,store_media,fload_media,fstore_media,fload_media,fpconv_media,fmove_media,ptabs_media,gettr_media,pt_media")
    (set_attr "length" "4,4,8,4,4,4,4,4,4,4,4,4,12")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_insn "*movsi_media_nofpu"
   [(set (match_operand:SI 0 "general_movdst_operand" "=r,r,r,r,m,*b,r,*b")
@@ -4761,7 +4810,10 @@ (define_insn "*movsi_media_nofpu"
 	pt	%1, %0"
   [(set_attr "type"   "arith_media,arith_media,*,load_media,store_media,ptabs_media,gettr_media,pt_media")
    (set_attr "length" "4,4,8,4,4,4,4,12")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_expand "movsi_const"
   [(set (match_operand:SI 0 "arith_reg_operand" "=r")
@@ -4854,7 +4906,7 @@ (define_expand "ic_invalidate_line"
     }
   else if (TARGET_SHCOMPACT)
     {
-      operands[1] = gen_rtx_SYMBOL_REF (Pmode, \"__ic_invalidate\");
+      operands[1] = function_symbol (NULL, \"__ic_invalidate\", SFUNC_STATIC);
       operands[1] = force_reg (Pmode, operands[1]);
       emit_insn (gen_ic_invalidate_line_compact (operands[0], operands[1]));
       DONE;
@@ -4924,7 +4976,10 @@ (define_insn "*movqi_media"
 	ld%M1.ub	%m1, %0
 	st%M0.b	%m0, %N1"
   [(set_attr "type" "arith_media,arith_media,load_media,store_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_expand "movqi"
   [(set (match_operand:QI 0 "general_operand" "")
@@ -4978,7 +5033,10 @@ (define_insn "*movhi_media"
 	ld%M1.w	%m1, %0
 	st%M0.w	%m0, %N1"
   [(set_attr "type" "arith_media,arith_media,*,load_media,store_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_split
   [(set (match_operand:HI 0 "register_operand" "=r")
@@ -6057,7 +6115,10 @@ (define_insn "movsf_media"
 	ld%M1.l	%m1, %0
 	st%M0.l	%m0, %N1"
   [(set_attr "type" "fmove_media,fload_media,fpconv_media,arith_media,*,fload_media,fstore_media,load_media,store_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_insn "movsf_media_nofpu"
   [(set (match_operand:SF 0 "general_movdst_operand" "=r,r,r,m")
@@ -6071,7 +6132,10 @@ (define_insn "movsf_media_nofpu"
 	ld%M1.l	%m1, %0
 	st%M0.l	%m0, %N1"
   [(set_attr "type" "arith_media,*,load_media,store_media")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 (define_split
   [(set (match_operand:SF 0 "arith_reg_operand" "")
@@ -7127,15 +7191,9 @@ (define_expand "call"
 	 run out of registers when adjusting fpscr for the call.  */
       emit_insn (gen_force_mode_for_call ());
 
-      operands[0] = gen_rtx_SYMBOL_REF (SImode,
-					\"__GCC_shcompact_call_trampoline\");
-      if (flag_pic)
-	{
-	  rtx reg = gen_reg_rtx (Pmode);
-
-	  emit_insn (gen_symGOTPLT2reg (reg, operands[0]));
-	  operands[0] = reg;
-	}
+      operands[0]
+	= function_symbol (NULL, \"__GCC_shcompact_call_trampoline\",
+			   SFUNC_GOT);
       operands[0] = force_reg (SImode, operands[0]);
 
       emit_move_insn (r0, func);
@@ -7247,15 +7305,9 @@ (define_expand "call_pop"
 	 run out of registers when adjusting fpscr for the call.  */
       emit_insn (gen_force_mode_for_call ());
 
-      operands[0] = gen_rtx_SYMBOL_REF (SImode,
-					\"__GCC_shcompact_call_trampoline\");
-      if (flag_pic)
-	{
-	  rtx reg = gen_reg_rtx (Pmode);
-
-	  emit_insn (gen_symGOTPLT2reg (reg, operands[0]));
-	  operands[0] = reg;
-	}
+      operands[0]
+	= function_symbol (NULL, \"__GCC_shcompact_call_trampoline\",
+			   SFUNC_GOT);
       operands[0] = force_reg (SImode, operands[0]);
 
       emit_move_insn (r0, func);
@@ -7355,15 +7407,9 @@ (define_expand "call_value"
 	 run out of registers when adjusting fpscr for the call.  */
       emit_insn (gen_force_mode_for_call ());
 
-      operands[1] = gen_rtx_SYMBOL_REF (SImode,
-					\"__GCC_shcompact_call_trampoline\");
-      if (flag_pic)
-	{
-	  rtx reg = gen_reg_rtx (Pmode);
-
-	  emit_insn (gen_symGOTPLT2reg (reg, operands[1]));
-	  operands[1] = reg;
-	}
+      operands[1]
+	= function_symbol (NULL, \"__GCC_shcompact_call_trampoline\",
+			   SFUNC_GOT);
       operands[1] = force_reg (SImode, operands[1]);
 
       emit_move_insn (r0, func);
@@ -7582,15 +7628,9 @@ (define_expand "sibcall"
 	 run out of registers when adjusting fpscr for the call.  */
       emit_insn (gen_force_mode_for_call ());
 
-      operands[0] = gen_rtx_SYMBOL_REF (SImode,
-					\"__GCC_shcompact_call_trampoline\");
-      if (flag_pic)
-	{
-	  rtx reg = gen_reg_rtx (Pmode);
-
-	  emit_insn (gen_symGOT2reg (reg, operands[0]));
-	  operands[0] = reg;
-	}
+      operands[0]
+	= function_symbol (NULL, \"__GCC_shcompact_call_trampoline\",
+			   SFUNC_GOT);
       operands[0] = force_reg (SImode, operands[0]);
 
       /* We don't need a return trampoline, since the callee will
@@ -7723,15 +7763,9 @@ (define_expand "call_value_pop"
 	 run out of registers when adjusting fpscr for the call.  */
       emit_insn (gen_force_mode_for_call ());
 
-      operands[1] = gen_rtx_SYMBOL_REF (SImode,
-					\"__GCC_shcompact_call_trampoline\");
-      if (flag_pic)
-	{
-	  rtx reg = gen_reg_rtx (Pmode);
-
-	  emit_insn (gen_symGOTPLT2reg (reg, operands[1]));
-	  operands[1] = reg;
-	}
+      operands[1]
+	= function_symbol (NULL, \"__GCC_shcompact_call_trampoline\",
+			   SFUNC_GOT);
       operands[1] = force_reg (SImode, operands[1]);
 
       emit_move_insn (r0, func);
@@ -8407,14 +8441,8 @@ (define_expand "shcompact_return_tramp"
   "
 {
   rtx reg = gen_rtx_REG (Pmode, R0_REG);
-  rtx sym = gen_rtx_SYMBOL_REF (Pmode,
-				\"__GCC_shcompact_return_trampoline\");
-
-  if (flag_pic)
-    emit_insn (gen_symGOTPLT2reg (reg, sym));
-  else
-    emit_move_insn (reg, sym);
 
+  function_symbol (reg, \"__GCC_shcompact_return_trampoline\", SFUNC_STATIC);
   emit_jump_insn (gen_shcompact_return_tramp_i ());
   DONE;
 }")
@@ -10842,7 +10870,10 @@ (define_insn "movv2hi_i"
 	st%M0.l	%m0, %N1"
   [(set_attr "type"   "arith_media,arith_media,*,load_media,store_media")
    (set_attr "length" "4,4,16,4,4")
-   (set_attr "highpart" "ignore")])
+   (set (attr "highpart")
+	(cond [(ne (symbol_ref "sh_contains_memref_p (insn)") (const_int 0))
+	       (const_string "user")]
+	      (const_string "ignore")))])
 
 ; FIXME: add splitter.
 
--- config/sh/sh-protos.h@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Thu Jul 22 16:20:58 2004
+++ config/sh/sh-protos.h	Tue Aug 17 16:45:32 2004
@@ -138,12 +138,26 @@ extern void sh_mark_label PARAMS ((rtx, 
 extern void fpscr_set_from_mem PARAMS ((int, HARD_REG_SET));
 #endif
 
+enum sh_function_kind {
+  /* A function with normal C ABI  */
+  FUNCTION_ORDINARY,
+  /* A special function that guarantees that some otherwise call-clobbered
+     registers are not clobbered.  These can't go through the SH5 resolver,
+     because it only saves argument passing registers.  */
+  SFUNC_GOT,
+  /* A special function that should be linked statically.  These are typically
+     smaller or not much larger than a PLT entry.  */
+  SFUNC_STATIC
+};
+
 #ifdef GCC_C_PRAGMA_H
 extern void sh_pr_interrupt PARAMS ((cpp_reader *));
 extern void sh_pr_trapa PARAMS ((cpp_reader *));
 extern void sh_pr_nosave_low_regs PARAMS ((cpp_reader *));
 #endif
 
+extern rtx function_symbol (rtx, const char *, enum sh_function_kind);
+
 extern void sh_init_builtins PARAMS ((void));
 
 extern void sh_output_mi_thunk PARAMS ((FILE *, tree, int, tree));
@@ -151,4 +165,6 @@ extern void sh_output_mi_vcall_thunk PAR
 
 extern rtx replace_n_hard_rtx (rtx, rtx *, int , int);
 
+extern int sh_contains_memref_p (rtx);
+
 #endif /* ! GCC_SH_PROTOS_H */
--- config/sh/libgcc-std.ver@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Thu Jul 22 14:11:43 2004
+++ config/sh/libgcc-std.ver	Fri Jul 30 16:37:28 2004
@@ -0,0 +1,239 @@
+GCC_3.0 {
+  # libgcc1 integer symbols
+  __absvsi2
+  __addvsi3
+  # __ashlsi3
+  # __ashrsi3
+  __divsi3
+  # __lshrsi3
+  __modsi3
+  # __mulsi3 ! this is an SH1-only symbol.
+  __mulvsi3
+  __negvsi2
+  __subvsi3
+  # __udivsi3
+  __umodsi3
+
+  # libgcc1 floating point symbols
+  __addsf3
+  __adddf3
+  __addxf3
+  __addtf3
+  __divsf3
+  __divdf3
+  __divxf3
+  __divtf3
+  __eqsf2
+  __eqdf2
+  __eqxf2
+  __eqtf2
+  __extenddfxf2
+  __extenddftf2
+  __extendsfdf2
+  __extendsfxf2
+  __extendsftf2
+  __fixsfsi
+  __fixdfsi
+  __fixxfsi
+  __fixtfsi
+  __floatsisf
+  __floatsidf
+  __floatsixf
+  __floatsitf
+  __gesf2
+  __gedf2
+  __gexf2
+  __getf2
+  __gtsf2
+  __gtdf2
+  __gtxf2
+  __gttf2
+  __lesf2
+  __ledf2
+  __lexf2
+  __letf2
+  __ltsf2
+  __ltdf2
+  __ltxf2
+  __lttf2
+  __mulsf3
+  __muldf3
+  __mulxf3
+  __multf3
+  __negsf2
+  __negdf2
+  __negxf2
+  __negtf2
+  __nesf2
+  __nedf2
+  __nexf2
+  __netf2
+  __subsf3
+  __subdf3
+  __subxf3
+  __subtf3
+  __truncdfsf2
+  __truncxfsf2
+  __trunctfsf2
+  __truncxfdf2
+  __trunctfdf2
+
+  # libgcc2 DImode arithmetic (for 32-bit targets).
+  __absvdi2
+  __addvdi3
+  __ashldi3
+  __ashrdi3
+  __cmpdi2
+  __divdi3
+  __ffsdi2
+  __fixdfdi
+  __fixsfdi
+  __fixtfdi
+  __fixxfdi
+  __fixunsdfdi
+  __fixunsdfsi
+  __fixunssfsi
+  __fixunssfdi
+  __fixunstfdi
+  __fixunstfsi
+  __fixunsxfdi
+  __fixunsxfsi
+  __floatdidf
+  __floatdisf
+  __floatdixf
+  __floatditf
+  __lshrdi3
+  __moddi3
+  __muldi3
+  __mulvdi3
+  __negdi2
+  __negvdi2
+  __subvdi3
+  __ucmpdi2
+  __udivdi3
+  __udivmoddi4
+  __umoddi3
+
+  # libgcc2 TImode arithmetic (for 64-bit targets).
+  __ashlti3
+  __ashrti3
+  __cmpti2
+  __divti3
+  __ffsti2
+  __fixdfti
+  __fixsfti
+  __fixtfti
+  __fixxfti
+  __lshrti3
+  __modti3
+  __multi3
+  __negti2
+  __ucmpti2
+  __udivmodti4
+  __udivti3
+  __umodti3
+  __fixunsdfti
+  __fixunssfti
+  __fixunstfti
+  __fixunsxfti
+  __floattidf
+  __floattisf
+  __floattixf
+  __floattitf
+
+  # Used to deal with trampoline initialization on some platforms
+  __clear_cache
+
+  # EH symbols
+  _Unwind_DeleteException
+  _Unwind_Find_FDE
+  _Unwind_ForcedUnwind
+  _Unwind_GetGR
+  _Unwind_GetIP
+  _Unwind_GetLanguageSpecificData
+  _Unwind_GetRegionStart
+  _Unwind_GetTextRelBase
+  _Unwind_GetDataRelBase
+  _Unwind_RaiseException
+  _Unwind_Resume
+  _Unwind_SetGR
+  _Unwind_SetIP
+  __deregister_frame
+  __deregister_frame_info
+  __deregister_frame_info_bases
+  __register_frame
+  __register_frame_info
+  __register_frame_info_bases
+  __register_frame_info_table
+  __register_frame_info_table_bases
+  __register_frame_table
+
+  # SjLj EH symbols
+  _Unwind_SjLj_Register
+  _Unwind_SjLj_Unregister
+  _Unwind_SjLj_RaiseException
+  _Unwind_SjLj_ForcedUnwind
+  _Unwind_SjLj_Resume
+}
+
+#%inherit GCC_3.3 GCC_3.0
+#GCC_3.3 {
+#  _Unwind_FindEnclosingFunction
+#  _Unwind_GetCFA
+#  _Unwind_Backtrace
+#  _Unwind_Resume_or_Rethrow
+#  _Unwind_SjLj_Resume_or_Rethrow
+#}
+#
+#%inherit GCC_3.3.1 GCC_3.3
+#GCC_3.3.1 {
+#  __gcc_personality_sj0
+#  __gcc_personality_v0
+#}
+#
+#%inherit GCC_3.3.2 GCC_3.3.1
+#GCC_3.3.2 {
+#}
+#%inherit GCC_3.3.4 GCC_3.3.2
+%inherit GCC_3.3.4 GCC_3.0
+GCC_3.3.4 {
+  __unorddf2
+  __unordsf2
+}
+
+%inherit GCC_3.4 GCC_3.3.4
+GCC_3.4 {
+  # bit scanning and counting built-ins
+  __clzsi2
+  __clzdi2
+  __clzti2
+  __ctzsi2
+  __ctzdi2
+  __ctzti2
+  __popcountsi2
+  __popcountdi2
+  __popcountti2
+  __paritysi2
+  __paritydi2
+  __parityti2
+  __sdivsi3	# must not use lazy linking
+  __div_table	# data
+  __GCC_shcompact_call_trampoline # must not use lazy linking
+  __GCC_shcompact_incoming_args	# must not use lazy linking
+  __GCC_push_shmedia_regs	# must not use lazy linking
+  __GCC_push_shmedia_regs_nofpu	# must not use lazy linking
+  __GCC_pop_shmedia_regs	# must not use lazy linking
+  __GCC_pop_shmedia_regs_nofpu	# must not use lazy linking
+ # The following symbols are for functions that are to small to warrant
+ #  putting them in a shared library.
+ # __sdvisi3_2
+ # __sdivsi3_i4
+ # __udivsi3
+ # __udivsi3_i4
+ # __set_fpscr
+ # __GCC_shcompact_return_trampoline
+ # __init_trampoline
+ # __ic_invalidate # FIXME: for SH4, should we put this into libicache*_s.so,
+ #      so that other shared libraries are cache-layout independent?
+ # __GCC_nested_trampoline
+}
--- config/sh/t-linux64@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Thu Jul 22 14:07:44 2004
+++ config/sh/t-linux64	Thu Jul 29 17:33:23 2004
@@ -8,3 +8,30 @@ MULTILIB_DIRNAMES= 
 MULTILIB_MATCHES = 
 
 EXTRA_MULTILIB_PARTS= crtbegin.o crtend.o crtbeginS.o crtendS.o
+
+# Override t-slibgcc-elf-ver to export some libgcc symbols with
+# the symbol versions that glibc used.  Also use an sh specific
+# libgcc-std.ver to avoid to export some lib1func routines which
+# should not be called via PLT.
+SHLIB_MAPFILES =  $(srcdir)/config/sh/libgcc-std.ver \
+	$(srcdir)/config/sh/libgcc-glibc.ver
+
+# Override SHLIB_LINK and SHLIB_INSTALL to use linker script
+# libgcc_s.so.
+SHLIB_LINK = $(GCC_FOR_TARGET) $(LIBGCC2_CFLAGS) -shared -nodefaultlibs \
+	-Wl,--soname=$(SHLIB_SONAME) \
+	-Wl,--version-script=$(SHLIB_MAP) \
+	-o $(SHLIB_NAME) @multilib_flags@ $(SHLIB_OBJS) $(SHLIB_LC) && \
+	rm -f $(SHLIB_SOLINK) && \
+	(echo "/* GNU ld script"; \
+	 echo "   Use the shared library, but some functions are only in"; \
+	 echo "   the static library.  */"; \
+	 echo "GROUP ( $(SHLIB_SONAME) libgcc.a )" \
+	) > $(SHLIB_SOLINK)
+SHLIB_INSTALL = \
+	$$(mkinstalldirs) $$(DESTDIR)$$(slibdir)$(SHLIB_SLIBDIR_QUAL); \
+	$(INSTALL_DATA) $(SHLIB_NAME) \
+	  $$(DESTDIR)$$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SONAME); \
+	rm -f $$(DESTDIR)$$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SOLINK); \
+	$(INSTALL_DATA) $(SHLIB_SOLINK) \
+	  $$(DESTDIR)$$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SOLINK)
--- config/sh/lib1funcs.asm@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Mon Jul 19 19:24:51 2004
+++ config/sh/lib1funcs.asm	Mon Aug  9 19:40:34 2004
@@ -48,6 +48,8 @@ Boston, MA 02111-1307, USA.  */
 #define ENDFUNC(X)
 #endif
 
+#define HIDDEN_FUNC(X)	FUNC(X); .hidden X
+
 #define	CONCAT(A,B)	A##B
 #define	GLOBAL0(U,X)	CONCAT(U,__##X)
 #define	GLOBAL(X)	GLOBAL0(__USER_LABEL_PREFIX__,X)
@@ -999,7 +1001,7 @@ hiset:	sts	macl,r0		! r0 = bb*dd
 !! args in r4 and r5, result in fpul, clobber dr0, dr2
 
 	.global	GLOBAL(sdivsi3_i4)
-	FUNC(GLOBAL(sdivsi3_i4))
+	HIDDEN_FUNC(GLOBAL(sdivsi3_i4))
 GLOBAL(sdivsi3_i4):
 	lds r4,fpul
 	float fpul,dr0
@@ -1018,7 +1020,7 @@ GLOBAL(sdivsi3_i4):
 	.mode	SHcompact
 #endif
 	.global	GLOBAL(sdivsi3_i4)
-	FUNC(GLOBAL(sdivsi3_i4))
+	HIDDEN_FUNC(GLOBAL(sdivsi3_i4))
 GLOBAL(sdivsi3_i4):
 	sts.l fpscr,@-r15
 	mov #8,r2
@@ -1051,7 +1053,6 @@ GLOBAL(sdivsi3_i4):
 !! args in r4 and r5, result in r0 clobber r1, r2, r3, and t bit
 
 	.global	GLOBAL(sdivsi3)
-	FUNC(GLOBAL(sdivsi3))
 #if __SHMEDIA__
 #if __SH5__ == 32
 	.section	.text..SHmedia32,"ax"
@@ -1184,10 +1185,14 @@ GLOBAL(sdivsi3):
  // inputs: r4,r5
  // clobbered: r1,r18,r19,r20,r21,r25,tr0
  // result in r0
+	HIDDEN_FUNC(GLOBAL(sdivsi3_2))
+#ifndef __pic__
+	FUNC(GLOBAL(sdivsi3))
 GLOBAL(sdivsi3):
  .global GLOBAL(div_table)
  movi (GLOBAL(div_table) >> 16) & 65535, r20
  shori GLOBAL(div_table) & 65535, r20
+#endif
  .global GLOBAL(sdivsi3_2)
  // div_table in r20
  // clobbered: r1,r18,r19,r21,r25,tr0
@@ -1226,6 +1231,10 @@ GLOBAL(sdivsi3_2):
  shard r21, r1, r21
  sub r21, r0, r0
  blink tr0, r63
+#ifndef __pic__
+	ENDFUNC(GLOBAL(sdivsi3))
+#endif
+	ENDFUNC(GLOBAL(sdivsi3_2))
 #endif
 #elif defined __SHMEDIA__
 /* m5compact-nofpu */
@@ -1233,6 +1242,7 @@ GLOBAL(sdivsi3_2):
 	.mode	SHmedia
 	.section	.text..SHmedia32,"ax"
 	.align	2
+	FUNC(GLOBAL(sdivsi3))
 GLOBAL(sdivsi3):
 	pt/l LOCAL(sdivsi3_dontsub), tr0
 	pt/l LOCAL(sdivsi3_loop), tr1
@@ -1257,7 +1267,9 @@ LOCAL(sdivsi3_dontsub):
 	xor r20,r19,r20
 	sub.l r20,r19,r0
 	blink tr2,r63
+	ENDFUNC(GLOBAL(sdivsi3))
 #else /* ! __SHMEDIA__ */
+	FUNC(GLOBAL(sdivsi3))
 GLOBAL(sdivsi3):
 	mov	r4,r1
 	mov	r5,r0
@@ -1355,7 +1367,7 @@ div0:	rts
 !! and t bit
 
 	.global	GLOBAL(udivsi3_i4)
-	FUNC(GLOBAL(udivsi3_i4))
+	HIDDEN_FUNC(GLOBAL(udivsi3_i4))
 GLOBAL(udivsi3_i4):
 	mov #1,r1
 	cmp/hi r1,r5
@@ -1402,7 +1414,7 @@ L1:
 !! args in r4 and r5, result in fpul, clobber r20, r21, dr0, fr33
 	.mode	SHmedia
 	.global	GLOBAL(udivsi3_i4)
-	FUNC(GLOBAL(udivsi3_i4))
+	HIDDEN_FUNC(GLOBAL(udivsi3_i4))
 GLOBAL(udivsi3_i4):
 	addz.l	r4,r63,r20
 	addz.l	r5,r63,r21
@@ -1422,6 +1434,7 @@ GLOBAL(udivsi3_i4):
 !! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4
 
 	.global	GLOBAL(udivsi3_i4)
+	HIDDEN_FUNC(GLOBAL(udivsi3_i4))
 GLOBAL(udivsi3_i4):
 	mov #1,r1
 	cmp/hi r1,r5
@@ -1481,7 +1494,7 @@ L1:
 
 !! args in r4 and r5, result in r0, clobbers r4, pr, and t bit
 	.global	GLOBAL(udivsi3)
-	FUNC(GLOBAL(udivsi3))
+	HIDDEN_FUNC(GLOBAL(udivsi3))
 
 #if __SHMEDIA__
 #if __SH5__ == 32
@@ -2050,7 +2063,7 @@ GLOBAL(init_trampoline):
 	st.l	r0,12,r3
 	ENDFUNC(GLOBAL(init_trampoline))
 	.global	GLOBAL(ic_invalidate)
-	FUNC(GLOBAL(ic_invalidate))
+	HIDDEN_FUNC(GLOBAL(ic_invalidate))
 GLOBAL(ic_invalidate):
 	ocbwb	r0,0
 	synco
@@ -2061,7 +2074,8 @@ GLOBAL(ic_invalidate):
 	ENDFUNC(GLOBAL(ic_invalidate))
 #elif defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
 	.global GLOBAL(ic_invalidate)
-	FUNC(GLOBAL(ic_invalidate))
+	/* FIXME: should this be exported from libicache*.so ? */
+	HIDDEN_FUNC(GLOBAL(ic_invalidate))
 GLOBAL(ic_invalidate):
 	ocbwb	@r4
 	mova	0f,r0
@@ -2509,7 +2523,7 @@ LOCAL(ct_ret_wide):	/* Call the function
 	.section	.text..SHmedia32, "ax"
 	.align	2
 	.global	GLOBAL(GCC_shcompact_return_trampoline)
-	FUNC(GLOBAL(GCC_shcompact_return_trampoline))
+	HIDDEN_FUNC(GLOBAL(GCC_shcompact_return_trampoline))
 GLOBAL(GCC_shcompact_return_trampoline):
 	ptabs/l	r18, tr0
 #if __LITTLE_ENDIAN__
@@ -2786,10 +2800,11 @@ GLOBAL(GCC_push_shmedia_regs):
 	fst.d	r15,  2*8, dr40
 	fst.d	r15,  1*8, dr38
 	fst.d	r15,  0*8, dr36
-#endif
+#else /* ! __SH4_NOFPU__ */
 	.global	GLOBAL(GCC_push_shmedia_regs_nofpu)
 	FUNC(GLOBAL(GCC_push_shmedia_regs_nofpu))
 GLOBAL(GCC_push_shmedia_regs_nofpu):
+#endif /* ! __SH4_NOFPU__ */
 	ptabs/l	r18, tr0
 	addi.l	r15, -27*8, r15
 	gettr	tr7, r62
@@ -2823,12 +2838,12 @@ GLOBAL(GCC_push_shmedia_regs_nofpu):
 	st.q	r15,  1*8, r29
 	st.q	r15,  0*8, r28
 	blink	tr0, r63
-
 #ifndef __SH4_NOFPU__	
 	ENDFUNC(GLOBAL(GCC_push_shmedia_regs))
-#endif
+#else
 	ENDFUNC(GLOBAL(GCC_push_shmedia_regs_nofpu))
-#ifndef __SH4_NOFPU__
+#endif
+#ifndef __SH4_NOFPU__	
 	.global	GLOBAL(GCC_pop_shmedia_regs)
 	FUNC(GLOBAL(GCC_pop_shmedia_regs))
 GLOBAL(GCC_pop_shmedia_regs):
@@ -2849,10 +2864,11 @@ GLOBAL(GCC_pop_shmedia_regs):
 	fld.d	r15, 28*8, dr38
 	fld.d	r15, 27*8, dr36
 	blink	tr1, r63
-#endif
+#else /* ! __SH4_NOFPU__	*/
 	.global	GLOBAL(GCC_pop_shmedia_regs_nofpu)
 	FUNC(GLOBAL(GCC_pop_shmedia_regs_nofpu))
 GLOBAL(GCC_pop_shmedia_regs_nofpu):
+#endif /* ! __SH4_NOFPU__	*/
 	movi	27*8, r0
 .L0:
 	ptabs	r18, tr0
@@ -2891,13 +2907,74 @@ GLOBAL(GCC_pop_shmedia_regs_nofpu):
 
 #ifndef __SH4_NOFPU__
 	ENDFUNC(GLOBAL(GCC_pop_shmedia_regs))
-#endif
+#else
 	ENDFUNC(GLOBAL(GCC_pop_shmedia_regs_nofpu))
+#endif
 #endif /* __SH5__ == 32 */
 #endif /* L_push_pop_shmedia_regs */
 
 #if __SH5__
 #ifdef L_div_table
+#if defined(__pic__) && defined(__SHMEDIA__)
+	.global	GLOBAL(sdivsi3)
+	FUNC(GLOBAL(sdivsi3))
+#if __SH5__ == 32
+	.section	.text..SHmedia32,"ax"
+#else
+	.text
+#endif
+/* ??? FIXME: Presumably due to a linker bug, exporting data symbols
+   in a text section does not work (at least for shared libraries):
+   the linker sets the LSB of the address as if this was SHmedia code.  */
+#define TEXT_DATA_BUG
+	.align	2
+ // inputs: r4,r5
+ // clobbered: r1,r18,r19,r20,r21,r25,tr0
+ // result in r0
+ .global GLOBAL(sdivsi3)
+GLOBAL(sdivsi3):
+#ifdef TEXT_DATA_BUG
+ ptb datalabel Local_div_table,tr0
+#else
+ ptb GLOBAL(div_table),tr0
+#endif
+ nsb r5, r1
+ shlld r5, r1, r25    // normalize; [-2 ..1, 1..2) in s2.62
+ shari r25, 58, r21   // extract 5(6) bit index (s2.4 with hole -1..1)
+ /* bubble */
+ gettr tr0,r20
+ ldx.ub r20, r21, r19 // u0.8
+ shari r25, 32, r25   // normalize to s2.30
+ shlli r21, 1, r21
+ muls.l r25, r19, r19 // s2.38
+ ldx.w r20, r21, r21  // s2.14
+  ptabs r18, tr0
+ shari r19, 24, r19   // truncate to s2.14
+ sub r21, r19, r19    // some 11 bit inverse in s1.14
+ muls.l r19, r19, r21 // u0.28
+  sub r63, r1, r1
+  addi r1, 92, r1
+ muls.l r25, r21, r18 // s2.58
+ shlli r19, 45, r19   // multiply by two and convert to s2.58
+  /* bubble */
+ sub r19, r18, r18
+ shari r18, 28, r18   // some 22 bit inverse in s1.30
+ muls.l r18, r25, r0  // s2.60
+  muls.l r18, r4, r25 // s32.30
+  /* bubble */
+ shari r0, 16, r19   // s-16.44
+ muls.l r19, r18, r19 // s-16.74
+  shari r25, 63, r0
+  shari r4, 14, r18   // s19.-14
+ shari r19, 30, r19   // s-16.44
+ muls.l r19, r18, r19 // s15.30
+  xor r21, r0, r21    // You could also use the constant 1 << 27.
+  add r21, r25, r21
+ sub r21, r19, r21
+ shard r21, r1, r21
+ sub r21, r0, r0
+ blink tr0, r63
+	ENDFUNC(GLOBAL(sdivsi3))
 /* This table has been generated by divtab.c .
 Defects for bias -330:
    Max defect: 6.081536e-07 at -1.000000e+00
@@ -2906,8 +2983,89 @@ Defects for bias -330:
    Min 2nd step defect: 0.000000e+00 at 0.000000e+00
    Defect at 1: 1.238659e-07
    Defect at -2: 1.061708e-07 */
+#else /* ! __pic__ || ! __SHMEDIA__ */
+	.section	.rodata
+#endif /* __pic__ */
+#if defined(TEXT_DATA_BUG) && defined(__pic__) && defined(__SHMEDIA__)
+	.balign 2
+	.type	Local_div_table,@object
+	.size	Local_div_table,128
+/* negative division constants */
+	.word	-16638
+	.word	-17135
+	.word	-17737
+	.word	-18433
+	.word	-19103
+	.word	-19751
+	.word	-20583
+	.word	-21383
+	.word	-22343
+	.word	-23353
+	.word	-24407
+	.word	-25582
+	.word	-26863
+	.word	-28382
+	.word	-29965
+	.word	-31800
+/* negative division factors */
+	.byte	66
+	.byte	70
+	.byte	75
+	.byte	81
+	.byte	87
+	.byte	93
+	.byte	101
+	.byte	109
+	.byte	119
+	.byte	130
+	.byte	142
+	.byte	156
+	.byte	172
+	.byte	192
+	.byte	214
+	.byte	241
+	.skip 16
+Local_div_table:
+	.skip 16
+/* positive division factors */
+	.byte	241
+	.byte	214
+	.byte	192
+	.byte	172
+	.byte	156
+	.byte	142
+	.byte	130
+	.byte	119
+	.byte	109
+	.byte	101
+	.byte	93
+	.byte	87
+	.byte	81
+	.byte	75
+	.byte	70
+	.byte	66
+/* positive division constants */
+	.word	31801
+	.word	29966
+	.word	28383
+	.word	26864
+	.word	25583
+	.word	24408
+	.word	23354
+	.word	22344
+	.word	21384
+	.word	20584
+	.word	19752
+	.word	19104
+	.word	18434
+	.word	17738
+	.word	17136
+	.word	16639
 	.section	.rodata
+#endif /* TEXT_DATA_BUG */
 	.balign 2
+	.type	GLOBAL(div_table),@object
+	.size	GLOBAL(div_table),128
 /* negative division constants */
 	.word	-16638
 	.word	-17135
--- ifcvt.c@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Thu Jul  8 14:35:28 2004
+++ ifcvt.c	Thu Jul  8 16:58:07 2004
@@ -2621,6 +2621,14 @@ dead_or_predicable (test_bb, merge_bb, o
       /* ??? bb->local_set is only valid during calculate_global_regs_live,
 	 so we must recompute usage for MERGE_BB.  Not so bad, I suppose, 
          since we've already asserted that MERGE_BB is small.  */
+      /* If we allocated new pseudos (e.g. in the conditional move
+	 expander called from noce_emit_cmove), we must resize the
+	 array first.  */
+      if (max_regno < max_reg_num ())
+	{
+	  max_regno = max_reg_num ();
+	  allocate_reg_info (max_regno, FALSE, FALSE);
+	}
       propagate_block (merge_bb, tmp, NULL, merge_set, merge_set, 0);
 
       /* For small register class machines, don't lengthen lifetimes of
@@ -2988,12 +2996,17 @@ noce_try_complex_cmove (basic_block test
   will_merge_if_block (test_bb, then_bb, else_bb, join_bb);
   for (i = info.input_count-1; i >= 0; i--)
     *info.input[i] = temp;
-  for (yi = then_bb->head; then_bb->head != then_bb->end; yi = next)
+  y_end = then_bb->end;
+  /* Include any barrier that may follow the basic block.  */
+  yi = next_nonnote_insn (y_end);
+  if (yi && GET_CODE (yi) == BARRIER)
+    y_end = yi;
+  for (yi = then_bb->head; ; yi = next)
     {
       next = NEXT_INSN (yi);
-      if (INSN_P (yi))
+      if (GET_CODE (yi) != NOTE)
 	next = delete_insn (yi);
-      if (yi == then_bb->end || PREV_INSN (yi) == then_bb->end)
+      if (yi == y_end)
 	break;
     }
   delete_insn (jump);
--- unroll.c@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Tue Jul 13 18:19:14 2004
+++ unroll.c	Tue Jul 13 18:24:30 2004
@@ -2409,6 +2409,8 @@ copy_loop_body (loop, copy_start, copy_e
 	     end test is that short, there will be a VTOP note between
 	     the CONT note and the test.  */
 	  if (GET_CODE (insn) == NOTE
+	      /* Don't emit again if we copied it earlier.  */
+	      && insn != copy_end
 	      && NOTE_LINE_NUMBER (insn) != NOTE_INSN_DELETED
 	      && NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK
 	      && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_VTOP)
--- config.gcc@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Fri Jul 23 10:22:43 2004
+++ config.gcc	Thu Jul 29 17:33:20 2004
@@ -2200,7 +2200,7 @@ sh-*-elf*)
 	float_format=sh
 	;;
 sh64-superh-linux*)
-	tmake_file="sh/t-sh sh/t-elf sh/t-le sh/t-sh64 sh/t-linux64"
+	tmake_file="t-slibgcc-elf-ver t-linux sh/t-sh sh/t-elf sh/t-le sh/t-sh64 sh/t-linux64"
 	tm_file=" sh/little.h sh/sh.h dbxelf.h elfos.h svr4.h sh/elf.h sh/sh64.h sh/linux64.h"
 	xmake_file=x-linux
 	gas=yes gnu_ld=yes
--- late-loop.c@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Wed Aug  4 16:53:17 2004
+++ late-loop.c	Wed Aug  4 18:45:50 2004
@@ -98,6 +98,10 @@ typedef struct tr_def_s
      as appropriate. */
   char other_tr_uses_before_def;
   char other_tr_uses_after_use;
+  /* We set own_end when we have moved a defintion into a dominator.
+     Thus, when a later combination removes this defintion again, we know
+     to clear out trs_live_at_end again.  */
+  char own_end;
   bitmap live_range;
 } *tr_def;
 
@@ -124,7 +128,7 @@ static void link_tr_uses PARAMS((tr_def 
 static void build_tr_def_use_webs PARAMS ((fibheap_t));
 static int block_at_edge_of_live_range_p PARAMS ((int, tr_def));
 static void clear_tr_from_live_range PARAMS ((tr_def def));
-static void add_tr_to_live_range PARAMS ((tr_def));
+static void add_tr_to_live_range PARAMS ((tr_def, int));
 static void augment_live_range PARAMS ((bitmap, HARD_REG_SET *, basic_block,
 					basic_block));
 static int choose_tr PARAMS ((HARD_REG_SET));
@@ -852,15 +856,20 @@ clear_tr_from_live_range (def)
 	     dump_trs_live (bb);
 	 }
      });
+  if (def->own_end)
+    CLEAR_HARD_REG_BIT (trs_live_at_end[def->bb->index], def->tr);
 }
 
 
 /* We are adding the def/use web DEF.  Add the target register used
    in this web to the live set of all of the basic blocks that contain
-   the live range of the web.  */
+   the live range of the web.
+   If OWN_END is set, also show that the register is live from our
+   definitions at the end of the basic block where it is defined.  */
 static void
-add_tr_to_live_range (def)
+add_tr_to_live_range (def, own_end)
      tr_def def;
+     int own_end;
 {
   int bb;
   EXECUTE_IF_SET_IN_BITMAP
@@ -871,6 +880,11 @@ add_tr_to_live_range (def)
        if (rtl_dump_file)
 	 dump_trs_live (bb);
      });
+  if (own_end)
+    {
+      SET_HARD_REG_BIT (trs_live_at_end[def->bb->index], def->tr);
+      def->own_end = 1;
+    }
 }
 
 /* Update a live range to contain the basic block NEW_BLOCK, and all
@@ -934,6 +948,10 @@ augment_live_range (live_range, trs_live
 	  bitmap_set_bit (live_range, bb->index);
 	  IOR_HARD_REG_SET (*trs_live_in_range,
 	    trs_live[bb->index]);
+	  /* A previous btr migration could have caused a register to be
+	     live just at the end of a block which we need in full.  */
+	  IOR_HARD_REG_SET (*trs_live_in_range,
+	    trs_live_at_end[bb->index]);
 	  if (rtl_dump_file)
 	    {
 	      fprintf (rtl_dump_file,
@@ -1106,7 +1124,7 @@ combine_tr_defs (def, trs_live_in_range)
 	      clear_tr_from_live_range (other_def);
 	      other_def->uses = NULL;
 	      bitmap_copy (def->live_range, combined_live_range);
-	      if (other_def->other_tr_uses_after_use)
+	      if (other_def->tr == tr && other_def->other_tr_uses_after_use)
 		def->other_tr_uses_after_use = 1;
 	      COPY_HARD_REG_SET (*trs_live_in_range, combined_trs_live);
 
@@ -1157,12 +1175,12 @@ move_tr_def (new_def_bb, tr, def, live_r
   def->bb = new_def_bb;
   def->luid = 0;
   def->cost = basic_block_freq (new_def_bb);
-  def->other_tr_uses_before_def
-    = TEST_HARD_REG_BIT (trs_live[b->index], tr) ? 1 : 0;
   bitmap_copy (def->live_range, live_range);
   combine_tr_defs (def, trs_live_in_range);
+  def->other_tr_uses_before_def
+    = TEST_HARD_REG_BIT (trs_live[b->index], tr) ? 1 : 0;
   tr = def->tr;
-  add_tr_to_live_range (def);
+  add_tr_to_live_range (def, 1);
   if (GET_CODE (insp) == CODE_LABEL)
     insp = NEXT_INSN (insp);
   /* N.B.: insp is expected to be NOTE_INSN_BASIC_BLOCK now.  Some
--- loop.c@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Mon Aug  9 15:59:35 2004
+++ loop.c	Mon Aug  9 16:10:37 2004
@@ -3330,6 +3330,19 @@ loop_invariant_p (loop, x)
 	  && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
 	return 0;
 
+      /* Out-of-range regs can occur when we are called from unrolling.
+	 These registers created by the unroller are set in the loop,
+	 hence are never invariant.
+	 Other out-of-range regs can be generated by load_mems; those that
+	 are written to in the loop are not invariant, while those that are
+	 not written to are invariant.  It would be easy for load_mems
+	 to set n_times_set correctly for these registers, however, there
+	 is no easy way to distinguish them from registers created by the
+	 unroller.  */
+
+      if (REGNO (x) >= (unsigned) regs->num)
+	return 0;
+
       if (regs->array[REGNO (x)].set_in_loop < 0)
 	return 2;
 
@@ -4584,6 +4597,9 @@ guard_widened_biv (loop, bl)
 	return 0;
     }
   new_check_val = gen_reg_rtx (biv_mode);
+  /* Mark this as user variable to tell loop_iterations that it's OK
+     to have this new register.  */
+  mark_user_reg (new_check_val);
   if (! validate_replace_rtx (check_val, new_check_val, cmp_insn))
       return 0;
   orig_mode = GET_MODE (XEXP (bl->biv->ext_dependent, 0));
--- cse.c@@/main/SH5GCC-CVS20020529.1800-int/renneckej-catalonia-200407/0	Wed Aug 11 17:28:14 2004
+++ cse.c	Wed Aug 11 17:31:23 2004
@@ -38,6 +38,7 @@ Software Foundation, 59 Temple Place - S
 #include "output.h"
 #include "ggc.h"
 #include "timevar.h"
+#include "basic-block.h"
 
 /* The basic idea of common subexpression elimination is to go
    through the code, keeping a record of expressions that would
@@ -7615,25 +7616,53 @@ dead_libcall_p (insn, counts)
   return false;
 }
 
+static regset_head trivially_dead_nonlocal_regs;
+
+/* Called via note_stores.  */
+void
+note_dead_set (rtx dest, rtx pat, void *data)
+{
+  basic_block bb = data;
+
+  if ((GET_CODE (pat) == SET && set_noop_p (pat))
+      || GET_CODE (dest) != REG
+      || ! REGNO_REG_SET_P (bb->global_live_at_end, REGNO (dest)))
+    return;
+  SET_REGNO_REG_SET (&trivially_dead_nonlocal_regs, REGNO (dest));
+}
+
 /* Scan all the insns and delete any that are dead; i.e., they store a register
    that is never used or they copy a register to itself.
 
    This is used to remove insns made obviously dead by cse, loop or other
    optimizations.  It improves the heuristics in loop since it won't try to
    move dead invariants out of loops or make givs for dead quantities.  The
-   remaining passes of the compilation are also sped up.  */
+   remaining passes of the compilation are also sped up.
+
+   When UPDATE_LIFE_P is nonzero, when we remove the sets of a register
+   that is not referenced anymore, also remove it from the liveness
+   information of all basic blocks.  Note, unlike update_life_info,
+   delete_trivially_dead_insns can find registers are set outside a loop
+   and used to, but are no longer referenced in the loop.  */
 
 int
 delete_trivially_dead_insns (insns, nreg)
      rtx insns;
      int nreg;
 {
+  int update_life_p = EXIT_BLOCK_PTR->global_live_at_start != NULL;
   int *counts;
   rtx insn, prev;
   int in_libcall = 0, dead_libcall = 0;
   int ndead = 0, nlastdead, niterations = 0;
 
   timevar_push (TV_DELETE_TRIVIALLY_DEAD);
+
+  if (update_life_p)
+    INIT_REG_SET (&trivially_dead_nonlocal_regs);
+  if (update_life_p)
+    compute_bb_for_insn (get_max_uid ());
+
   /* First count the number of times each register is used.  */
   counts = (int *) xcalloc (nreg, sizeof (int));
   for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
@@ -7681,6 +7710,9 @@ delete_trivially_dead_insns (insns, nreg
 
 	  if (! live_insn)
 	    {
+	      if (update_life_p)
+		note_stores (PATTERN (insn), note_dead_set,
+			     BLOCK_FOR_INSN (insn));
 	      count_reg_usage (insn, counts, NULL_RTX, -1);
 	      delete_insn_and_edges (insn);
 	      ndead++;
@@ -7699,6 +7731,23 @@ delete_trivially_dead_insns (insns, nreg
     fprintf (rtl_dump_file, "Deleted %i trivially dead insns; %i iterations\n",
 	     ndead, niterations);
   /* Clean up.  */
+  if (update_life_p)
+    {
+      basic_block bb;
+
+      FOR_EACH_BB (bb)
+	{
+	  AND_COMPL_REG_SET (bb->global_live_at_start,
+			     &trivially_dead_nonlocal_regs);
+	  AND_COMPL_REG_SET (bb->global_live_at_end,
+			     &trivially_dead_nonlocal_regs);
+	  AND_COMPL_REG_SET (bb->global_high_live_at_start,
+			     &trivially_dead_nonlocal_regs);
+	  AND_COMPL_REG_SET (bb->global_high_live_at_end,
+			     &trivially_dead_nonlocal_regs);
+	}
+      CLEAR_REG_SET (&trivially_dead_nonlocal_regs);
+    }
   free (counts);
   timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
   return ndead;



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