fix unsorted/bit.c

[Richard Henderson]

This is sorta twisty.

The block comment before simplify_comparison is wrong -- we *can* prove
new tautologies here, because it's the first place that we factor in
information from nonzero_bits.

This lead combine to create

   (set (reg:DI x)
	(if_then_else:DI (lt (const_int 0) (const_int 0))
			 (const_int 1)
			 (const_int 2)))

We recognized this in combine and continued.  Later, we broke out the
LT expression into its own instruction and failed to recognize it.

My solution here is to deny the original recognition, by allowing exactly
one constant in the conditional move instructions.  

Arguably, simplify_comparison and/or its callers should be updated.

Except that, by denying the recognition of the above pattern first,
we come back with a combination of three instructions (instead of two)
that prompts whatever bits of combine were supposed to do the folding
in the first place, and *do* fold away the conditional.

Which implies that another general solution might be the fold-three-
instructions-first patch that's been submitted.

So I'm not sure what should be done about combine proper, and so have
done nothing.

Tested on alphaev67-linux.



r~


        * config/alpha/alpha.md (movqicc_internal): Allow exactly one
        zero in the conditional.
        (movhicc_internal, movsicc_internal, movdicc_internal): Likewise.

Index: config/alpha/alpha.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.md,v
retrieving revision 1.226
diff -c -p -d -u -r1.226 alpha.md
--- config/alpha/alpha.md	20 Sep 2004 20:13:39 -0000	1.226
+++ config/alpha/alpha.md	28 Oct 2004 17:15:49 -0000
@@ -3061,7 +3061,7 @@
 			  (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
 	 (match_operand:QI 1 "add_operand" "rI,0,rI,0")
 	 (match_operand:QI 5 "add_operand" "0,rI,0,rI")))]
-  "(operands[3] == const0_rtx || operands[4] == const0_rtx)"
+  "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
   "@
    cmov%C2 %r3,%1,%0
    cmov%D2 %r3,%5,%0
@@ -3077,7 +3077,7 @@
 			  (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
 	 (match_operand:HI 1 "add_operand" "rI,0,rI,0")
 	 (match_operand:HI 5 "add_operand" "0,rI,0,rI")))]
-  "(operands[3] == const0_rtx || operands[4] == const0_rtx)"
+  "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
   "@
    cmov%C2 %r3,%1,%0
    cmov%D2 %r3,%5,%0
@@ -3093,7 +3093,7 @@
 			  (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
 	 (match_operand:SI 1 "add_operand" "rI,0,rI,0")
 	 (match_operand:SI 5 "add_operand" "0,rI,0,rI")))]
-  "(operands[3] == const0_rtx || operands[4] == const0_rtx)"
+  "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
   "@
    cmov%C2 %r3,%1,%0
    cmov%D2 %r3,%5,%0
@@ -3109,7 +3109,7 @@
 			  (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
 	 (match_operand:DI 1 "add_operand" "rI,0,rI,0")
 	 (match_operand:DI 5 "add_operand" "0,rI,0,rI")))]
-  "(operands[3] == const0_rtx || operands[4] == const0_rtx)"
+  "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
   "@
    cmov%C2 %r3,%1,%0
    cmov%D2 %r3,%5,%0