Committed: Fix PR target/18331, MMIX

Hans-Peter Nilsson hp@bitrange.com
Sun Nov 28 12:53:00 GMT 2004


I shouldn't generate an insn for which half the alternatives will just
abort, as the 'D' constraint will do for nonreversible CC modes.  (Which
is actually just CC_FP, but best to keep the generalization.)  Still odd
that it happens so rarely, being this obvious.  No regressions with a
checkout of "Tue Nov 23 00:28:36 GMT 2004".

	PR target/18331
	* config/mmix/mmix.md ("*movdicc_real_reversible"): Rename from
	"*movdicc_real".  Only match reversible comparisons.
	("*movdicc_real_nonreversible"): New pattern, split from
	"*movdicc_real".  Match only nonreversible comparisons.  Exclude
	reversed alternatives.
	("*movdfcc_real_reversible", "*movdfcc_real_nonreversible"):
	Similar.

--- mmix.md.orig	Fri Feb  6 08:54:15 2004
+++ mmix.md	Thu Nov 25 03:42:12 2004
@@ -769,7 +769,7 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\
    ZS%d2 %0,%3,%1
    ZS%D2 %0,%3,%4")

-(define_insn "*movdicc_real"
+(define_insn "*movdicc_real_reversible"
   [(set
     (match_operand:DI 0 "register_operand"	   "=r ,r ,r ,r")
     (if_then_else:DI
@@ -779,13 +779,28 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\
       (const_int 0)])
      (match_operand:DI 1 "mmix_reg_or_8bit_operand" "rI,0 ,rI,GM")
      (match_operand:DI 4 "mmix_reg_or_8bit_operand" "0 ,rI,GM,rI")))]
-  ""
+  "REVERSIBLE_CC_MODE (GET_MODE (operands[3]))"
   "@
    CS%d2 %0,%3,%1
    CS%D2 %0,%3,%4
    ZS%d2 %0,%3,%1
    ZS%D2 %0,%3,%4")

+(define_insn "*movdicc_real_nonreversible"
+  [(set
+    (match_operand:DI 0 "register_operand"	   "=r ,r")
+    (if_then_else:DI
+     (match_operator
+      2 "mmix_comparison_operator"
+      [(match_operand 3 "mmix_reg_cc_operand"	    "r ,r")
+      (const_int 0)])
+     (match_operand:DI 1 "mmix_reg_or_8bit_operand" "rI,rI")
+     (match_operand:DI 4 "mmix_reg_or_0_operand" "0 ,GM")))]
+  "!REVERSIBLE_CC_MODE (GET_MODE (operands[3]))"
+  "@
+   CS%d2 %0,%3,%1
+   ZS%d2 %0,%3,%1")
+
 (define_insn "*movdfcc_real_foldable"
   [(set
     (match_operand:DF 0 "register_operand"	"=r  ,r  ,r  ,r")
@@ -803,7 +818,7 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\
    ZS%d2 %0,%3,%1
    ZS%D2 %0,%3,%4")

-(define_insn "*movdfcc_real"
+(define_insn "*movdfcc_real_reversible"
   [(set
     (match_operand:DF 0 "register_operand"	"=r  ,r  ,r  ,r")
     (if_then_else:DF
@@ -813,12 +828,27 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\
       (const_int 0)])
      (match_operand:DF 1 "mmix_reg_or_0_operand" "rGM,0  ,rGM,GM")
      (match_operand:DF 4 "mmix_reg_or_0_operand" "0  ,rGM,GM ,rGM")))]
-  ""
+  "REVERSIBLE_CC_MODE (GET_MODE (operands[3]))"
   "@
    CS%d2 %0,%3,%1
    CS%D2 %0,%3,%4
    ZS%d2 %0,%3,%1
    ZS%D2 %0,%3,%4")
+
+(define_insn "*movdfcc_real_nonreversible"
+  [(set
+    (match_operand:DF 0 "register_operand"	"=r  ,r")
+    (if_then_else:DF
+     (match_operator
+      2 "mmix_comparison_operator"
+      [(match_operand 3 "mmix_reg_cc_operand"	 "r  ,r")
+      (const_int 0)])
+     (match_operand:DF 1 "mmix_reg_or_0_operand" "rGM,rGM")
+     (match_operand:DF 4 "mmix_reg_or_0_operand" "0  ,GM")))]
+  "!REVERSIBLE_CC_MODE (GET_MODE (operands[3]))"
+  "@
+   CS%d2 %0,%3,%1
+   ZS%d2 %0,%3,%1")

 ;; FIXME: scc patterns will probably help, I just skip them
 ;; right now.  Revisit.

brgds, H-P



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