Fix code assembling for UltraSPARC III on Solaris

[Eric Botcazou]

My recent overhaul of the SPARC options made me realize that there is a big 
problem with 32-bit code generation for UltraSPARC III on Solaris: the code 
can't be assembled.  *sigh*

poog% gcc/xgcc -Bgcc -c t.c -m32 -mcpu=ultrasparc3
/usr/ccs/bin/as: "/var/tmp//cceNxUlq.s", line 17: error: cannot use v8plus 
instructions in a non-v8plus target binary

The problem is that GCC generates SPARC-V8+ code by default on Solaris in 
32-bit mode for all SPARC-V9 processors, but doesn't say it to the assembler 
for UltraSPARC III.  Hence it complains.

Fixed by the attached patch, tested on sparc64-sun-solaris2.9, applied to 
mainline and 3.4 branch.


2004-02-01  Eric Botcazou  <ebotcazou@libertysurf.fr>

	* config/sparc/sol2-bi.h: Handle TARGET_CPU_ultrasparc3.
	(CPP_CPU_SPEC): Handle -mcpu=ultrasparc3.
	(ASM_CPU_SPEC): Likewise
	* config/sparc/sol2.h: Handle TARGET_CPU_ultrasparc3.
	(ASM_CPU_SPEC): Remove -mcpu=v8plus.  Handle -mcpu=ultrasparc3.


-- 
Eric Botcazou
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