fix rtl-opt/15289, part 2
Richard Henderson
rth@redhat.com
Wed Dec 1 17:51:00 GMT 2004
A small patchlet after I noticed that we were generating
(subreg:SF (reg:SC 0 ax) 0) when setting up the return value
instead of (reg:SF 0 ax) as expected.
This was bootstrapped and tested with several other patches
on i686, alpha, and ia64 linux.
r~
* expmed.c (store_bit_field): Use simplify_gen_subreg instead
of gen_rtx_SUBREG directly.
Index: expmed.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/expmed.c,v
retrieving revision 1.209
diff -c -p -d -r1.209 expmed.c
*** expmed.c 27 Nov 2004 01:01:12 -0000 1.209
--- expmed.c 1 Dec 2004 17:33:11 -0000
*************** store_bit_field (rtx str_rtx, unsigned H
*** 431,451 ****
{
if (GET_MODE (op0) != fieldmode)
{
! if (GET_CODE (op0) == SUBREG)
! {
! /* Else we've got some float mode source being extracted
! into a different float mode destination -- this
! combination of subregs results in Severe Tire
! Damage. */
! gcc_assert (GET_MODE (SUBREG_REG (op0)) == fieldmode
! || GET_MODE_CLASS (fieldmode) == MODE_INT
! || GET_MODE_CLASS (fieldmode) == MODE_PARTIAL_INT);
! op0 = SUBREG_REG (op0);
! }
! if (REG_P (op0))
! op0 = gen_rtx_SUBREG (fieldmode, op0, byte_offset);
! else
op0 = adjust_address (op0, fieldmode, offset);
}
emit_move_insn (op0, value);
return value;
--- 431,441 ----
{
if (GET_MODE (op0) != fieldmode)
{
! if (MEM_P (op0))
op0 = adjust_address (op0, fieldmode, offset);
+ else
+ op0 = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0),
+ byte_offset);
}
emit_move_insn (op0, value);
return value;
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