[committed] MIPS3D macroisation (part 1)
Richard Sandiford
rsandifo@redhat.com
Mon Aug 30 10:50:00 GMT 2004
This patch just macroises the conditional move and staged reduced-
precision instructions. There should be no behavioural changes.
As before, I tested this by comparing the output of MIPS's testsuite
before and after the patch, both big and little endian. There were
no differences. Applied to head.
Richard
* config/mips/mips.md (UNSPEC_{RSQRT,RECIP}[12]_{S,D,PS}): Delete.
(UNSPEC_{RSQRT,RECIP}[12]): New constants.
* config/mips/mips-ps-3d.md (*movcc_v2sf_[sd]i): Use :GPR.
(mips_{rsqrt,recip}[12]_{s,d,ps}): Use :ANYF.
Index: config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.296
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.296 mips.md
*** config/mips/mips.md 29 Aug 2004 12:06:00 -0000 1.296
--- config/mips/mips.md 30 Aug 2004 06:59:37 -0000
*************** (define_constants
*** 52,57 ****
--- 52,58 ----
;; For MIPS Paired-Singled Floating Point Instructions.
+ (UNSPEC_MOVE_TF_PS 200)
(UNSPEC_C_F 201)
(UNSPEC_C_UN 202)
(UNSPEC_C_EQ 203)
*************** (define_constants
*** 96,116 ****
(UNSPEC_CVT_PS_PW 236)
(UNSPEC_MULR_PS 237)
! (UNSPEC_RECIP1_S 238)
! (UNSPEC_RECIP1_D 239)
! (UNSPEC_RECIP1_PS 240)
! (UNSPEC_RECIP2_S 241)
! (UNSPEC_RECIP2_D 242)
! (UNSPEC_RECIP2_PS 243)
!
! (UNSPEC_RSQRT1_S 244)
! (UNSPEC_RSQRT1_D 245)
! (UNSPEC_RSQRT1_PS 246)
! (UNSPEC_RSQRT2_S 247)
! (UNSPEC_RSQRT2_D 248)
! (UNSPEC_RSQRT2_PS 249)
!
! (UNSPEC_MOVE_TF_PS 250)
]
)
--- 97,106 ----
(UNSPEC_CVT_PS_PW 236)
(UNSPEC_MULR_PS 237)
! (UNSPEC_RSQRT1 238)
! (UNSPEC_RSQRT2 239)
! (UNSPEC_RECIP1 240)
! (UNSPEC_RECIP2 241)
]
)
Index: config/mips/mips-ps-3d.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips-ps-3d.md,v
retrieving revision 1.3
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.3 mips-ps-3d.md
*** config/mips/mips-ps-3d.md 29 Aug 2004 10:30:33 -0000 1.3
--- config/mips/mips-ps-3d.md 30 Aug 2004 06:59:39 -0000
***************
*** 18,43 ****
;; the Free Software Foundation, 59 Temple Place - Suite 330,
;; Boston, MA 02111-1307, USA.
! (define_insn "*movcc_v2sf_di"
[(set (match_operand:V2SF 0 "register_operand" "=f,f")
(if_then_else:V2SF
! (match_operator:DI 4 "equality_operator"
! [(match_operand:DI 1 "register_operand" "d,d")
! (const_int 0)])
! (match_operand:V2SF 2 "register_operand" "f,0")
! (match_operand:V2SF 3 "register_operand" "0,f")))]
! "TARGET_PAIRED_SINGLE_FLOAT"
! "@
! mov%T4.ps\t%0,%2,%1
! mov%t4.ps\t%0,%3,%1"
! [(set_attr "type" "condmove")
! (set_attr "mode" "SF")])
!
! (define_insn "*movcc_v2sf_si"
! [(set (match_operand:V2SF 0 "register_operand" "=f,f")
! (if_then_else:V2SF
! (match_operator:SI 4 "equality_operator"
! [(match_operand:SI 1 "register_operand" "d,d")
(const_int 0)])
(match_operand:V2SF 2 "register_operand" "f,0")
(match_operand:V2SF 3 "register_operand" "0,f")))]
--- 18,28 ----
;; the Free Software Foundation, 59 Temple Place - Suite 330,
;; Boston, MA 02111-1307, USA.
! (define_insn "*movcc_v2sf_<mode>"
[(set (match_operand:V2SF 0 "register_operand" "=f,f")
(if_then_else:V2SF
! (match_operator:GPR 4 "equality_operator"
! [(match_operand:GPR 1 "register_operand" "d,d")
(const_int 0)])
(match_operand:V2SF 2 "register_operand" "f,0")
(match_operand:V2SF 3 "register_operand" "0,f")))]
*************** (define_insn "bc1any2f"
*** 1423,1558 ****
; Floating Point Reduced Precision Reciprocal Square Root Instructions.
;----------------------------------------------------------------------------
! ; Floating Point Reduced Precision Reciprocal Square Root
! ; for Single (Sequence Step 1)
! (define_insn "mips_rsqrt1_s"
! [(set (match_operand:SF 0 "register_operand" "=f")
! (unspec:SF [(match_operand:SF 1 "register_operand" "f")]
! UNSPEC_RSQRT1_S))]
! "TARGET_MIPS3D"
! "rsqrt1.s\t%0,%1"
! [(set_attr "type" "frsqrt")
! (set_attr "mode" "SF")])
!
! ; Floating Point Reduced Precision Reciprocal Square Root
! ; for Double (Sequence Step 1)
! (define_insn "mips_rsqrt1_d"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (unspec:DF [(match_operand:DF 1 "register_operand" "f")]
! UNSPEC_RSQRT1_D))]
! "TARGET_MIPS3D"
! "rsqrt1.d\t%0,%1"
! [(set_attr "type" "frsqrt")
! (set_attr "mode" "DF")])
!
! ; Floating Point Reduced Precision Reciprocal Square Root
! ; for Paired Singles (Sequence Step 1)
! (define_insn "mips_rsqrt1_ps"
! [(set (match_operand:V2SF 0 "register_operand" "=f")
! (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "f")]
! UNSPEC_RSQRT1_PS))]
! "TARGET_MIPS3D"
! "rsqrt1.ps\t%0,%1"
! [(set_attr "type" "frsqrt")
! (set_attr "mode" "SF")])
!
! ; Floating Point Reduced Precision Reciprocal Square Root
! ; for Single (Sequence Step 2)
! (define_insn "mips_rsqrt2_s"
! [(set (match_operand:SF 0 "register_operand" "=f")
! (unspec:SF [(match_operand:SF 1 "register_operand" "f")
! (match_operand:SF 2 "register_operand" "f")]
! UNSPEC_RSQRT2_S))]
! "TARGET_MIPS3D"
! "rsqrt2.s\t%0,%1,%2"
! [(set_attr "type" "frsqrt")
! (set_attr "mode" "SF")])
!
! ; Floating Point Reduced Precision Reciprocal Square Root
! ; for Double (Sequence Step 2)
! (define_insn "mips_rsqrt2_d"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (unspec:DF [(match_operand:DF 1 "register_operand" "f")
! (match_operand:DF 2 "register_operand" "f")]
! UNSPEC_RSQRT2_D))]
"TARGET_MIPS3D"
! "rsqrt2.d\t%0,%1,%2"
[(set_attr "type" "frsqrt")
! (set_attr "mode" "DF")])
! ; Floating Point Reduced Precision Reciprocal Square Root
! ; for Paired Singles (Sequence Step 2)
! (define_insn "mips_rsqrt2_ps"
! [(set (match_operand:V2SF 0 "register_operand" "=f")
! (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "f")
! (match_operand:V2SF 2 "register_operand" "f")]
! UNSPEC_RSQRT2_PS))]
"TARGET_MIPS3D"
! "rsqrt2.ps\t%0,%1,%2"
[(set_attr "type" "frsqrt")
! (set_attr "mode" "SF")])
!
! ; Floating Point Reduced Precision Reciprocal for Single (Sequence Step 1)
! (define_insn "mips_recip1_s"
! [(set (match_operand:SF 0 "register_operand" "=f")
! (unspec:SF [(match_operand:SF 1 "register_operand" "f")]
! UNSPEC_RECIP1_S))]
! "TARGET_MIPS3D"
! "recip1.s\t%0,%1"
! [(set_attr "type" "frdiv")
! (set_attr "mode" "SF")])
! ; Floating Point Reduced Precision Reciprocal for Double (Sequence Step 1)
! (define_insn "mips_recip1_d"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (unspec:DF [(match_operand:DF 1 "register_operand" "f")]
! UNSPEC_RECIP1_D))]
"TARGET_MIPS3D"
! "recip1.d\t%0,%1"
[(set_attr "type" "frdiv")
! (set_attr "mode" "DF")])
! ; Floating Point Reduced Precision Reciprocal for Paired Singles
! ; (Sequence Step 1)
! (define_insn "mips_recip1_ps"
! [(set (match_operand:V2SF 0 "register_operand" "=f")
! (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "f")]
! UNSPEC_RECIP1_PS))]
"TARGET_MIPS3D"
! "recip1.ps\t%0,%1"
[(set_attr "type" "frdiv")
! (set_attr "mode" "SF")])
!
! ; Floating Point Reduced Precision Reciprocal for Single (Sequence Step 2)
! (define_insn "mips_recip2_s"
! [(set (match_operand:SF 0 "register_operand" "=f")
! (unspec:SF [(match_operand:SF 1 "register_operand" "f")
! (match_operand:SF 2 "register_operand" "f")]
! UNSPEC_RECIP2_S))]
! "TARGET_MIPS3D"
! "recip2.s\t%0,%1,%2"
! [(set_attr "type" "frdiv")
! (set_attr "mode" "SF")])
!
! ; Floating Point Reduced Precision Reciprocal for Double (Sequence Step 2)
! (define_insn "mips_recip2_d"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (unspec:DF [(match_operand:DF 1 "register_operand" "f")
! (match_operand:DF 2 "register_operand" "f")]
! UNSPEC_RECIP2_D))]
! "TARGET_MIPS3D"
! "recip2.d\t%0,%1,%2"
! [(set_attr "type" "frdiv")
! (set_attr "mode" "DF")])
!
! ; Floating Point Reduced Precision Reciprocal for Paired Singles
! ; (Sequence Step 2)
! (define_insn "mips_recip2_ps"
! [(set (match_operand:V2SF 0 "register_operand" "=f")
! (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "f")
! (match_operand:V2SF 2 "register_operand" "f")]
! UNSPEC_RECIP2_PS))]
! "TARGET_MIPS3D"
! "recip2.ps\t%0,%1,%2"
! [(set_attr "type" "frdiv")
! (set_attr "mode" "SF")])
--- 1408,1447 ----
; Floating Point Reduced Precision Reciprocal Square Root Instructions.
;----------------------------------------------------------------------------
! (define_insn "mips_rsqrt1_<fmt>"
! [(set (match_operand:ANYF 0 "register_operand" "=f")
! (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f")]
! UNSPEC_RSQRT1))]
"TARGET_MIPS3D"
! "rsqrt1.<fmt>\t%0,%1"
[(set_attr "type" "frsqrt")
! (set_attr "mode" "<UNITMODE>")])
! (define_insn "mips_rsqrt2_<fmt>"
! [(set (match_operand:ANYF 0 "register_operand" "=f")
! (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f")
! (match_operand:ANYF 2 "register_operand" "f")]
! UNSPEC_RSQRT2))]
"TARGET_MIPS3D"
! "rsqrt2.<fmt>\t%0,%1,%2"
[(set_attr "type" "frsqrt")
! (set_attr "mode" "<UNITMODE>")])
! (define_insn "mips_recip1_<fmt>"
! [(set (match_operand:ANYF 0 "register_operand" "=f")
! (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f")]
! UNSPEC_RECIP1))]
"TARGET_MIPS3D"
! "recip1.<fmt>\t%0,%1"
[(set_attr "type" "frdiv")
! (set_attr "mode" "<UNITMODE>")])
! (define_insn "mips_recip2_<fmt>"
! [(set (match_operand:ANYF 0 "register_operand" "=f")
! (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f")
! (match_operand:ANYF 2 "register_operand" "f")]
! UNSPEC_RECIP2))]
"TARGET_MIPS3D"
! "recip2.<fmt>\t%0,%1,%2"
[(set_attr "type" "frdiv")
! (set_attr "mode" "<UNITMODE>")])
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