[PATCH] altivec fixes to manual and test altivec-18.c

Janis Johnson janis187@us.ibm.com
Mon Aug 23 20:49:00 GMT 2004


A statement I "fixed" about the AltiVec programming interface turned out
to be untrue, as was the statement it replaced.  This patch fixes it yet
again and also fixes the test that allows us to notice if the behavior
changes.

OK for mainline and 3.4 branch?  (The test isn't yet on the branch.)

[gcc/ChangeLog]
2004-08-23  Janis Johnson  <janis187@us.ibm.com>

	* doc/extend.texi (AltiVec Builtins): Fix info about signedness.

[gcc/testsuite/ChangeLog]
2004-08-23  Janis Johnson  <janis187@us.ibm.com>

	* gcc.dg/altivec-18.c: Fix for darwin.

Index: doc/extend.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/extend.texi,v
retrieving revision 1.209
diff -u -p -r1.209 extend.texi
--- doc/extend.texi	17 Aug 2004 22:51:28 -0000	1.209
+++ doc/extend.texi	23 Aug 2004 20:29:02 -0000
@@ -5785,9 +5785,10 @@ A vector initializer requires no cast if
 same type as the variable it is initializing.
 
 @item
-If @code{signed} or @code{unsigned} is omitted, the vector type defaults
-to @code{signed} for @code{vector int} or @code{vector short} and to
-@code{unsigned} for @code{vector char}.
+If @code{signed} or @code{unsigned} is omitted, the signedness of the
+vector type is the default signedness of the base type.  The default
+varies depending on the operating system, so a portable program should
+always specify the signedness.
 
 @item
 Compiling with @option{-maltivec} adds keywords @code{__vector},

Index: testsuite/gcc.dg/altivec-18.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.dg/altivec-18.c,v
retrieving revision 1.1
diff -u -p -r1.1 altivec-18.c
--- testsuite/gcc.dg/altivec-18.c	16 Aug 2004 17:09:13 -0000	1.1
+++ testsuite/gcc.dg/altivec-18.c	23 Aug 2004 20:29:18 -0000
@@ -1,13 +1,14 @@
 /* { dg-do compile { target powerpc*-*-* } } */
 /* { dg-xfail-if "" { "powerpc-ibm-aix*" } { "-maltivec" } { "" } } */
 /* { dg-options "-maltivec -mabi=altivec" } */
-/* { dg-final { scan-assembler "vcmpgtub" } } */
+/* { dg-final { scan-assembler "vcmpgtub" { target *-*-linux* } } } */
+/* { dg-final { scan-assembler "vcmpgtsb" { target *-*-darwin* } } } */
 /* { dg-final { scan-assembler "vcmpgtsh" } } */
 /* { dg-final { scan-assembler "vcmpgtsw" } } */
 
 /* Verify a statement in the GCC Manual that vector type specifiers can
-   omit "signed" or "unsigned", with the default being "signed" for int
-   and short, and "unsigned" for char.  */
+   omit "signed" or "unsigned".  The default is the default signedness
+   of the base type, which differs depending on the ABI.  */
 
 #include <altivec.h>
 



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