RFA: MIPS paired single support

[James E Wilson]

-- 
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com

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First a few general comments.  I haven't added in the SB-1 support.  I will
submit that as a separate patch after this one gets accepted.  It is just an
extension of this one, so there shouldn't be much to discuss there.

The little-endian/vec_select bug Chao-ying Fu pointed out was a good testcase
for me to understand how endianness issues with the vector support should work.
I ended up coming to the same conclusions as the SH port, which is that we
have to treat everything as being in memory order.  So element 0 is the
element that is at offset 0 if the vector is in memory.  I updated the mips
port to match, and added this info to the docs.

One thing I didn't fix is vec_merge.  Doing this right requires bit-reversing
a bit-vector, which does not conveniently map to a C language operation.  So
I left it broken in the hopes that it will be someday replaced with something
better.  Hint: a parallel makes a lot more sense than a bit mask here.

Now, for changes I made to the patch that Chao-ying Fu provided.

I fixed a number of style issues.  Sentences always start with a capital
letter and end with a period and two spaces, even if it is a sentence fragment
in a comment.  There were a lot of places that used 8 spaces instead of tabs,
I tried to find and fix them all.  Otherwise, there were only a few small
changes to style.

I added ADJUST_BYTESIZE and ADJUST_ALIGNMENT calls in mips-mode.def.  Doing
this allows us to eliminate or simiplify a number of checks for CCmodes.
For instance, in mips_hard_regno_nregs, we don't need explicit checks for
CCV2mode and CCV4mode, we can just do a check for ST_REG_P, and then do a
divide just like we do for the other cases.

I added CONST_VECTOR support to mips_const_insns for that we can support
constant vectors like 0 in the movv2sf pattern.

I modified the option handling a little.  I added an error if -mips3d and
-mno-paired-single were used together.  I moved the one code section so it
would be next to the other.  I dropped tests for TARGET_MIPS3D because that
is redundant when also testing TARGET_PAIRED_SINGLE_FLOAT.  I added an error
if the ISA does not support paired single instructions.

I modified mips_init_builtins to return if !TARGET_PAIRED_SINGLE_FLOAT.  That
let me drop the if statement, which in turn eliminated a lot of compile time
warnings about variables that might be used before they are set.  I replaced
calls to builtin_function to be lang_hooks.builtin_function instead, since this
may be language dependent.

In the builtin function expanders, I delete all code that looked like this:
  if (VECTOR_MODE_P (mode0) && op0 == const0_rtx)
     op0 = gen_reg_rtx (mode0);
All that did was cause the functions to fail if you passed in a constant 0,
as it would replace the constant with a register without copying the constant
into the register.  This stuff is redundant with the predicate checks, since
if the predicate does not accept a constant, then it will get copied into a
register anyways.

I added a cpp predefine for __mips_paired_single_float.

I added a new extra constraint "Y" for 0 valued vector constants.  I modified
the movv2sf pattern to use Y instead of G.

I deleted the UNSPEC_CVT_S_PL and UNSPEC_CVT_S_PU and replaced them with
uses of vec_select.

I modified predicates.md so const_0_operand and const_1_operand can accept
const_vector.  The const_1_operand is needed for the followup SB-1 patch.
The const_0_operand change is needed for the movv2sf pattern.

I documented the new -mpaired-single and -mips3d options.

I deleted all of the redundant "length" "4" attributes.

I added ldxc1/sdxc1 support.

I added asterisks to the maddv2sf and msubv2sf patterns as these aren't
standard names.

I added canonical nmadd/nmsub patterns for -fno-fast-math and -ffast-math.

I fixed endianness confusion in the vec_init, mips_cvt_ps_s, mips_cvt_s_pl,
and mips_cvt_s_pu patterns.

I added vec_extractv2sf and vec_setv2sf patterns.

I switched the operand order in the branch patterns.  The default length
attribute calculation requires that the label is operand 1.

That wasn't really a lot of changes, considering the size of the patch.  There
may have been a few more I missed.

I haven't changed any of the testcases, so I didn't bother to include them
in this patch.

This was tested against the gcc.dg testsuite for both big and little endian
with no regressions.  This includes all of the new ps and 3d testcases.

Now that I am happy with the patch, I will be doing a build from scratch and
full make check to test it just to be sure.  I will also try some hardware
testing.  I just wanted to get the patch out so people can start looking at it.
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