RFC: MIPS paired single vector support

Nigel Stephens nigel@mips.com
Thu Aug 12 14:13:00 GMT 2004



James E Wilson wrote:

>This is a work in progress.  I am posting this so people can see what
>progress I have been making, and so people can comment on the design of
>it.  If I need to change something, I'd rather know sooner rather than
>later.
>  
>

Hi Jim

Sadly we've both been operating in stealth mode on this one. :-(

We've also been working here on adding both paired-single, and MIPS-3D, 
to GCC. We've got a working patch to gcc-3.4 and we were working on 
moving that to mainline, so that it could be contributed now that we've 
at last got our assignments sorted out (for gcc at least).

I guess that we need to agree which to go forward with, or whether we 
can merge our efforts in any way.

FYI I attach our current plain text description of our added features.

>There are some ABI issues here.  For parameter passing and function
>return values, I am treating the vector values same as doubles.  This is
>necessary to get good performance for code using vectors.  I do this
>always, even if the target does not have paired single instructions, so
>that the ABI is consistent for all targets.  This gives poor code if you
>don't have paired single instructions though.
>
>  
>

Seems right. We did the same.

>The patch itself should be pretty straight forward.  I added patterns
>for all of the paired single instructions in the mips32r2 and mips64
>architectures, plus the paired single instruction extensions that are in
>the SB-1 processor.
>
>  
>

We won't have the SB-1 extensions, of course, but we have got MIPS-3D.

Have you done anything about MDMX support in the compiler?

>The compare instructions set two FP condition code registers.  So I
>added a CCPSmode that requires two FP cc registers.  The compare stuff
>is still unfinished.  I haven't figured out a good way to define builtin
>functions for them yet.  I am still playing with this.  We may have to
>live with workarounds until we get better vector support from the LNO
>branch.
>  
>

Again we did similarly, but further added 4-way condition codes for 
MIPS-3D and builtins to test those in various combinations.

Regards

Nigel

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