[patch] MIPS/gcc: Revert removal of DImode shifts for 32-bit targets
Nigel Stephens
nigel@mips.com
Wed Aug 4 20:54:00 GMT 2004
Maciej W. Rozycki wrote:
> Here are my proposals I've referred to previously. Instruction counts
>are 9, 9 and 10, respectively, as I've missed an additional instruction
>required to handle shifts by 0 (or actually any multiples of 64).
>
IMHO handling a shift by zero correctly is important.
> "not %1, %3\n\t"
> "srlv %1, %L2, %1\n\t"
> "srl %1, %1, 1\n\t"
>
Why not the shorter:
> "neg %1, %3\n\t"
> "srlv %1, %L2, %1\n\t"
>
>
>
And then in __ashrdi3:
"andi %1, %3, 0x20\n\t"
".set push\n\t"
".set noat\n\t"
"sra $1, %M2, 31\n\t"
"movn %L0, %M0, %1\n\t"
"movn %M0, $1, %1\n\t"
".set pop"
Cute, but I think that should be
"sra $1, %M0, 31\n\t"
(i.e %M0 not %M2)
Nigel
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