[patch] MIPS/gcc: Revert removal of DImode shifts for 32-bit targets
Tue Aug 3 06:06:00 GMT 2004
Nigel Stephens <email@example.com> writes:
> I have a patch against gcc-3.4 which makes the 64-bit inline shifts
> somewhat smaller on ISAs which include the conditional move
> (movz/movn) instructions, but more importantly removes all branches
> from the inline code - which can be very expensive on long pipeline
> CPUs, since in this sort of code they tend to cause many branch
> mispredicts. Let me know if you want me to extract the patch - here's
> a table of the number of instructions generated by the original md
> pattern and the patched version:
> Old New
> ashldi3 12 9
> ashrdi3 12 12
> lshrdi3 12 9
> If people really don't like the inline expansion, then maybe it could be
> enabled or disabled by a new -m option.
IMO, controlling with optimize_size would be enough. But it sounds from
your description like the patch just adds a new hard-coded multi-insn
asm string. Is that right? If so, I'd really like to avoid that.
It would much better IMO if we handle this in the target-independent
parts of the compiler. We can already open-code certain non-native
operations, it's "just" that wide shifts are a missing case.
If we handle it in a target-independent way, with each insn exposed
separately, we will be able to optimize special cases better.
We'll also get the usual scheduling benefits.
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