[patch] h8300.md: Give names to anonymous insns.

Kazu Hirata kazu@cs.umass.edu
Thu Nov 27 15:34:00 GMT 2003


Hi,

Attached is a patch to give names to anonymous insns so that ChangeLog
entries would be more useful/readable when somebody wants to refer to
these insns.

Committed as obvious.

Kazu Hirata

2003-11-27  Kazu Hirata  <kazu@cs.umass.edu>

	* config/h8300/h8300.md: Give names to anonymous insns.

Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.246
diff -u -r1.246 h8300.md
--- h8300.md	27 Nov 2003 14:16:29 -0000	1.246
+++ h8300.md	27 Nov 2003 14:42:33 -0000
@@ -730,7 +730,7 @@
   [(set_attr "length" "2")
    (set_attr "cc" "set_znv")])
 
-(define_insn ""
+(define_insn "*tsthi_upper"
   [(set (cc0)
 	(and:HI (match_operand:HI 0 "register_operand" "r")
 		(const_int -256)))]
@@ -746,7 +746,7 @@
   [(set_attr "length" "2")
    (set_attr "cc" "set_znv")])
 
-(define_insn ""
+(define_insn "*tstsi_upper"
   [(set (cc0)
 	(and:SI (match_operand:SI 0 "register_operand" "r")
 		(const_int -65536)))]
@@ -970,7 +970,7 @@
   ""
   "")
 
-(define_insn ""
+(define_insn "*subhi3_h8300"
   [(set (match_operand:HI 0 "register_operand" "=r,&r")
 	(minus:HI (match_operand:HI 1 "general_operand" "0,0")
 		  (match_operand:HI 2 "nonmemory_operand" "r,n")))]
@@ -981,7 +981,7 @@
   [(set_attr "length" "2,4")
    (set_attr "cc" "set_zn,clobber")])
 
-(define_insn ""
+(define_insn "*subhi3_h8300hs"
   [(set (match_operand:HI 0 "register_operand" "=r,&r")
 	(minus:HI (match_operand:HI 1 "general_operand" "0,0")
 		  (match_operand:HI 2 "nonmemory_operand" "r,n")))]
@@ -1189,7 +1189,7 @@
 ;; AND INSTRUCTIONS
 ;; ----------------------------------------------------------------------
 
-(define_insn ""
+(define_insn "*andqi3_1"
   [(set (match_operand:QI 0 "bit_operand" "=r,U")
 	(and:QI (match_operand:QI 1 "bit_operand" "%0,0")
 		(match_operand:QI 2 "nonmemory_operand" "rn,n")))]
@@ -1289,7 +1289,7 @@
 ;; OR INSTRUCTIONS
 ;; ----------------------------------------------------------------------
 
-(define_insn ""
+(define_insn "*iorqi3_1"
   [(set (match_operand:QI 0 "bit_operand" "=r,U")
 	(ior:QI (match_operand:QI 1 "bit_operand" "%0,0")
 		(match_operand:QI 2 "nonmemory_operand" "rn,n")))]
@@ -1330,7 +1330,7 @@
 ;; XOR INSTRUCTIONS
 ;; ----------------------------------------------------------------------
 
-(define_insn ""
+(define_insn "*xorqi3_1"
   [(set (match_operand:QI 0 "bit_operand" "=r,U")
 	(xor:QI (match_operand:QI 1 "bit_operand" "%0,0")
 		(match_operand:QI 2 "nonmemory_operand" "rn,n")))]
@@ -1371,7 +1371,7 @@
 ;; {AND,IOR,XOR}{HI3,SI3} PATTERNS
 ;; ----------------------------------------------------------------------
 
-(define_insn ""
+(define_insn "*logicalhi3"
   [(set (match_operand:HI 0 "register_operand" "=r")
 	(match_operator:HI 3 "bit_operator"
 	  [(match_operand:HI 1 "register_operand" "%0")
@@ -1383,7 +1383,7 @@
    (set (attr "cc")
 	(symbol_ref "compute_logical_op_cc (HImode, operands)"))])
 
-(define_insn ""
+(define_insn "*logicalsi3"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(match_operator:SI 3 "bit_operator"
 	  [(match_operand:SI 1 "register_operand" "%0")
@@ -1533,7 +1533,7 @@
   ""
   "")
 
-(define_insn ""
+(define_insn "*one_cmplhi2_h8300"
   [(set (match_operand:HI 0 "register_operand" "=r")
 	(not:HI (match_operand:HI 1 "register_operand" "0")))]
   "TARGET_H8300"
@@ -1541,7 +1541,7 @@
   [(set_attr "cc" "clobber")
    (set_attr "length" "4")])
 
-(define_insn ""
+(define_insn "*one_cmplhi2_h8300hs"
   [(set (match_operand:HI 0 "register_operand" "=r")
 	(not:HI (match_operand:HI 1 "register_operand" "0")))]
   "TARGET_H8300H || TARGET_H8300S"
@@ -1555,7 +1555,7 @@
   ""
   "")
 
-(define_insn ""
+(define_insn "*one_complsi2_h8300"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(not:SI (match_operand:SI 1 "register_operand" "0")))]
   "TARGET_H8300"
@@ -1563,7 +1563,7 @@
   [(set_attr "cc" "clobber")
    (set_attr "length" "8")])
 
-(define_insn ""
+(define_insn "*one_complsi2_h8300hs"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(not:SI (match_operand:SI 1 "register_operand" "0")))]
   "TARGET_H8300H || TARGET_H8300S"
@@ -2403,7 +2403,7 @@
   [(set_attr "length" "2,4,6")
    (set_attr "cc" "clobber,clobber,clobber")])
 
-(define_insn ""
+(define_insn "*zero_extendhisi2_h8300hs"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(zero_extend:SI (match_operand:HI 1 "register_operand" "0")))]
   "TARGET_H8300H || TARGET_H8300S"
@@ -2417,7 +2417,7 @@
   ""
   "")
 
-(define_insn ""
+(define_insn "*extendqihi2_h8300"
   [(set (match_operand:HI 0 "register_operand" "=r,r")
 	(sign_extend:HI (match_operand:QI 1 "general_operand_src" "0,g>")))]
   "TARGET_H8300"
@@ -2427,7 +2427,7 @@
   [(set_attr "length" "4,8")
    (set_attr "cc" "clobber,clobber")])
 
-(define_insn ""
+(define_insn "*extendqihi2_h8300hs"
   [(set (match_operand:HI 0 "register_operand" "=r")
 	(sign_extend:HI (match_operand:QI 1 "register_operand" "0")))]
   "TARGET_H8300H || TARGET_H8300S"
@@ -2483,7 +2483,7 @@
   [(set_attr "length" "6,10")
    (set_attr "cc" "clobber,clobber")])
 
-(define_insn ""
+(define_insn "*extendhisi2_h8300hs"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(sign_extend:SI (match_operand:HI 1 "register_operand" "0")))]
   "TARGET_H8300H || TARGET_H8300S"
@@ -2533,7 +2533,7 @@
   ""
   "expand_a_shift (QImode, LSHIFTRT, operands); DONE;")
 
-(define_insn ""
+(define_insn "*shiftqi"
   [(set (match_operand:QI 0 "register_operand" "=r,r")
 	(match_operator:QI 3 "nshift_operator"
 			[ (match_operand:QI 1 "register_operand" "0,0")
@@ -2569,7 +2569,7 @@
   ""
   "expand_a_shift (HImode, ASHIFTRT, operands); DONE;")
 
-(define_insn ""
+(define_insn "*shifthi"
   [(set (match_operand:HI 0 "register_operand" "=r,r")
 	(match_operator:HI 3 "nshift_operator"
 			[ (match_operand:HI 1 "register_operand" "0,0")
@@ -2605,7 +2605,7 @@
   ""
   "expand_a_shift (SImode, ASHIFTRT, operands); DONE;")
 
-(define_insn ""
+(define_insn "*shiftsi"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
 	(match_operator:SI 3 "nshift_operator"
 			[ (match_operand:SI 1 "register_operand" "0,0")



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