Patch to remove some mips Pmode != ptr_mode handling

[Richard Sandiford]

At one point mips-rewrite had Pmode == DImode for all 64-bit targets
(a way of trying to avoid too many sign-extensions).  This seemed
to make performance worse, though, so it was changed back to how
it is now.

The patch below just removes some lingering Pmode != ptr_mode support.
The extendsidi2 part fixes execute/bcp-1.c for -mabi=64: the expander
was aceepting more constants than it could handle.

Tested on irix6, mips64vrel-elf and mipsel-linux-gnu.  OK to install?

Richard


	* config/mips/mips.h (INITIALIZE_TRAMPOLINE): Simplify.
	* config/mips/mips.c (mips_load_got): Assume Pmode == ptr_mode.
	* config/mips/mips.md (extendsidi2, *extendsidi2): Merge. Don't accept
	contant operands.

Index: config/mips/mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.245
diff -c -d -p -F^[(a-zA-Z0-9_^#] -r1.245 mips.h
*** config/mips/mips.h	1 May 2003 02:33:12 -0000	1.245
--- config/mips/mips.h	3 May 2003 07:45:53 -0000
*************** #define INITIALIZE_TRAMPOLINE(ADDR, FUNC
*** 3074,3083 ****
  									    \
    func_addr = plus_constant (ADDR, 32);					    \
    chain_addr = plus_constant (func_addr, GET_MODE_SIZE (ptr_mode));	    \
!   emit_move_insn (gen_rtx_MEM (ptr_mode, func_addr),			    \
! 		  gen_lowpart (ptr_mode, force_reg (Pmode, FUNC)));	    \
!   emit_move_insn (gen_rtx_MEM (ptr_mode, chain_addr),			    \
! 		  gen_lowpart (ptr_mode, force_reg (Pmode, CHAIN)));	    \
  									    \
    /* Flush both caches.  We need to flush the data cache in case	    \
       the system has a write-back cache.  */				    \
--- 3074,3081 ----
  									    \
    func_addr = plus_constant (ADDR, 32);					    \
    chain_addr = plus_constant (func_addr, GET_MODE_SIZE (ptr_mode));	    \
!   emit_move_insn (gen_rtx_MEM (ptr_mode, func_addr), FUNC);		    \
!   emit_move_insn (gen_rtx_MEM (ptr_mode, chain_addr), CHAIN);		    \
  									    \
    /* Flush both caches.  We need to flush the data cache in case	    \
       the system has a write-back cache.  */				    \
Index: config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.257
diff -c -d -p -F^[(a-zA-Z0-9_^#] -r1.257 mips.c
*** config/mips/mips.c	1 May 2003 02:33:12 -0000	1.257
--- config/mips/mips.c	3 May 2003 07:45:51 -0000
*************** mips_load_got (base, addr, reloc)
*** 1773,1781 ****
    if (reloc != RELOC_CALL16 && reloc != RELOC_CALL_LO)
      RTX_UNCHANGING_P (mem) = 1;
  
-   if (Pmode != ptr_mode)
-     mem = gen_rtx_SIGN_EXTEND (Pmode, mem);
- 
    return mem;
  }
  
--- 1801,1806 ----
Index: config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.164
diff -c -d -p -F^[(a-zA-Z0-9_^#] -r1.164 mips.md
*** config/mips/mips.md	1 May 2003 02:33:13 -0000	1.164
--- config/mips/mips.md	3 May 2003 07:45:54 -0000
*************** (define_insn ""
*** 4335,4355 ****
  ;; Extension insns.
  ;; Those for integer source operand are ordered widest source type first.
  
! (define_expand "extendsidi2"
!   [(set (match_operand:DI 0 "register_operand" "")
!         (sign_extend:DI (match_operand:SI 1 "move_operand" "")))]
!   "TARGET_64BIT"
!   "
! {
!  if (symbolic_operand (operands[1], SImode))
!    {
!       emit_move_insn (operands[0], convert_memory_address (DImode, operands[1]));
!       DONE;
!    }
! 
! }")
! 
! (define_insn "*extendsidi2"
    [(set (match_operand:DI 0 "register_operand" "=d,d")
          (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m")))]
    "TARGET_64BIT"
--- 4335,4341 ----
  ;; Extension insns.
  ;; Those for integer source operand are ordered widest source type first.
  
! (define_insn "extendsidi2"
    [(set (match_operand:DI 0 "register_operand" "=d,d")
          (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m")))]
    "TARGET_64BIT"