[PATCH] Fix PR optimization/9888 (part #2)

Eric Botcazou ebotcazou@libertysurf.fr
Sat Mar 8 20:09:00 GMT 2003


Hi,

This is the second part of the repairing work of the insn length counting 
machinery on x86. The testcase provided by Jim Bray (submitter of the PR, 
who did a substantial amount of work in order to shrink it) contains a loop 
with 35 insns, one third (roughly) of which are given a wrong length by the 
branch shortening pass of the compiler.


This patch corrects three mistakes:

- the movsi_1 and movhi_1 patterns contain special alternatives for the %eax 
register whose only purpose is to give a smaller length to the insn when 
%eax is the destination register. The problem is that I see nowhere in my 
x86 asm manual (actually I see a possible source of confusion) why we should 
do that and, indeed, the size of the insns in each following pair is exactly 
the same according to objdump -d:

	movl $255, %eax
	movl $255, %ebx
	movl (%ebp,%ecx,4), %eax
	movl (%ebp,%ecx,4), %ebx

- "leal" instructions are systematically given a length of 2 (instead of 7 in 
some cases!) because the special treatment they deserve has been scrapped by 
the patch I mentioned in my first message. "leal" insns are represented by 
SETs whose source in not a MEM; now ix86_attr_length_address_default() 
returns 0 if it didn't find MEMs...

- there is an oddity in the x86 indexed/indirect addressing mode:

	movl 1(,%ecx,4), %eax

is longer (7) than

	movl 1(%ebp,%ecx,4), %eax

which counts 4 bytes only. The bug (not taking into account the oddity) has 
been present since the very beginning.

Bootstrapped/regtested (c,c++,f77,objc for all 3 active branches) on 
k6-redhat-linux-gnu. The patch is not sufficient to let the testcase pass 
(jump instructions may still be under-evaluated because they are not 
detected as being varying length instructions) but I manually verified that 
34 out of 35 insns in the loop are now given the right length. This is not 
sufficient because the loop is out of range by one byte exactly.

Ok for mainline and 3.3? Ok for 3.2 too?

-- 
Eric Botcazou


2003-03-08  Eric Botcazou  <ebotcazou@libertysurf.fr>

        PR optimization/9888
	* config/i386/i386.md (movsi_1): Remove special alternatives
	for %eax register.
	(movhi_1): Likewise.
	* config/i386/i386.c (memory_address_length): Do not use
	short displacement when there is no base.
	(ix86_attr_length_address_default): Handle LEA instructions.
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