[patch] h8300: Merge some IOR and XOR patterns.

Kazu Hirata kazu@cs.umass.edu
Sun Mar 2 19:12:00 GMT 2003


Hi,

Attached is a patch to merge some IOR and XOR patterns.

IOR and XOR patterns can be generalized and merged.  For example,
patterns accepting

(set (reg:HI)
     (ior:HI (zero_extend:HI (reg:QI))
	     (reg:HI))

and

(set (reg:HI)
     (xor:HI (zero_extend:HI (reg:QI))
	     (reg:HI))

can be merged by using match_operator in place of IOR or XOR.  The
patch implements the infrastructure for this as well as merges some
patterns.

Tested on h8300 port.  Committed.

Kazu Hirata

2003-03-02  Kazu Hirata  <kazu@cs.umass.edu>

	* config/h8300/h8300-protos.h: Add a prototype for
	iorxor_operator.
	* config/h8300/h8300.c (print_operand): Handle 'c'.
	(iorxor_operator): New.
	* config/h8300/h8300.h (PREDICATE_CODES): Add iorxor_operator.
	* config/h8300/h8300.md (*iorhi3_zext): Remove.
	(*iorsi3_zexthi): Likewise.
	(*iorsi3_zextsi): Likewise.
	(*xorhi3_zextqi): Likewise.
	(*xorsi3_zexthi): Likewise.
	(*xorsi3_zextsi): Likewise.
	(*ixorhi3_zext): New.
	(*ixorsi3_zext_qi): Likewise.
	(*ixorsi3_zext_hi): Likewise.

Index: h8300-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300-protos.h,v
retrieving revision 1.51
diff -c -r1.51 h8300-protos.h
*** h8300-protos.h	19 Feb 2003 12:53:32 -0000	1.51
--- h8300-protos.h	2 Mar 2003 19:06:09 -0000
***************
*** 69,74 ****
--- 69,75 ----
  extern int nshift_operator PARAMS ((rtx, enum machine_mode));
  extern int eqne_operator PARAMS ((rtx, enum machine_mode));
  extern int gtuleu_operator PARAMS ((rtx, enum machine_mode));
+ extern int iorxor_operator PARAMS ((rtx, enum machine_mode));
  
  extern int h8300_eightbit_constant_address_p PARAMS ((rtx));
  extern int h8300_tiny_constant_address_p PARAMS ((rtx));
Index: h8300.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.c,v
retrieving revision 1.216
diff -c -r1.216 h8300.c
*** h8300.c	1 Mar 2003 14:19:22 -0000	1.216
--- h8300.c	2 Mar 2003 19:06:10 -0000
***************
*** 1238,1243 ****
--- 1238,1244 ----
         If this operand isn't a register, fall back to 'R' handling.
     'Z' print int & 7.
     'b' print the bit opcode
+    'c' print the opcode corresponding to rtl
     'e' first word of 32 bit value - if reg, then least reg. if mem
         then least. if const then most sig word
     'f' second word of 32 bit value - if reg, then biggest reg. if mem
***************
*** 1390,1395 ****
--- 1391,1409 ----
  	  break;
  	}
        break;
+     case 'c':
+       switch (GET_CODE (x))
+ 	{
+ 	case IOR:
+ 	  fprintf (file, "or");
+ 	  break;
+ 	case XOR:
+ 	  fprintf (file, "xor");
+ 	  break;
+ 	default:
+ 	  break;
+ 	}
+       break;
      case 'e':
        switch (GET_CODE (x))
  	{
***************
*** 1901,1906 ****
--- 1915,1932 ----
    enum rtx_code code = GET_CODE (x);
  
    return (code == GTU || code == LEU);
+ }
+ 
+ /* Return nonzero if X is either IOR or XOR.  */
+ 
+ int
+ iorxor_operator (x, mode)
+      rtx x;
+      enum machine_mode mode ATTRIBUTE_UNUSED;
+ {
+   enum rtx_code code = GET_CODE (x);
+ 
+   return (code == IOR || code == XOR);
  }
  
  /* Recognize valid operators for bit instructions.  */
Index: h8300.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.h,v
retrieving revision 1.136
diff -c -r1.136 h8300.h
*** h8300.h	19 Feb 2003 12:53:32 -0000	1.136
--- h8300.h	2 Mar 2003 19:06:11 -0000
***************
*** 1292,1297 ****
    {"bit_operator", {XOR, AND, IOR}},					\
    {"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}},			\
    {"eqne_operator", {EQ, NE}},						\
!   {"gtuleu_operator", {GTU, LEU}},
  
  #endif /* ! GCC_H8300_H */
--- 1292,1298 ----
    {"bit_operator", {XOR, AND, IOR}},					\
    {"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}},			\
    {"eqne_operator", {EQ, NE}},						\
!   {"gtuleu_operator", {GTU, LEU}},					\
!   {"iorxor_operator", {IOR, XOR}},
  
  #endif /* ! GCC_H8300_H */
Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.179
diff -c -r1.179 h8300.md
*** h8300.md	2 Mar 2003 13:40:25 -0000	1.179
--- h8300.md	2 Mar 2003 19:06:12 -0000
***************
*** 2765,2781 ****
    [(set_attr "cc" "clobber")
     (set_attr "length" "6")])
  
! ;; ior:HI
  
! (define_insn "*iorhi3_zext"
    [(set (match_operand:HI 0 "register_operand" "=r")
! 	(ior:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
! 		(match_operand:HI 2 "register_operand" "0")))]
    ""
!   "or\\t%X1,%s0"
    [(set_attr "cc" "clobber")
     (set_attr "length" "2")])
  
  (define_insn "*iorhi3_ashift_8"
    [(set (match_operand:HI 0 "register_operand" "=r")
  	(ior:HI (ashift:HI (match_operand:HI 1 "register_operand" "r")
--- 2765,2806 ----
    [(set_attr "cc" "clobber")
     (set_attr "length" "6")])
  
! ;; [ix]or:HI
  
! (define_insn "*ixorhi3_zext"
    [(set (match_operand:HI 0 "register_operand" "=r")
! 	(match_operator:HI 1 "iorxor_operator"
! 	  [(zero_extend:HI (match_operand:QI 2 "register_operand" "r"))
! 	   (match_operand:HI 3 "register_operand" "0")]))]
!   ""
!   "%c1.b\\t%X2,%s0"
!   [(set_attr "cc" "clobber")
!    (set_attr "length" "2")])
! 
! ;; [ix]or:SI
! 
! (define_insn "*ixorsi3_zext_qi"
!   [(set (match_operand:SI 0 "register_operand" "=r")
! 	(match_operator:SI 1 "iorxor_operator"
! 	  [(zero_extend:SI (match_operand:QI 2 "register_operand" "r"))
! 	   (match_operand:SI 3 "register_operand" "0")]))]
!   ""
!   "%c1.b\\t%X2,%w0"
!   [(set_attr "cc" "clobber")
!    (set_attr "length" "2")])
! 
! (define_insn "*ixorsi3_zext_hi"
!   [(set (match_operand:SI 0 "register_operand" "=r")
! 	(match_operator:SI 1 "iorxor_operator"
! 	  [(zero_extend:SI (match_operand:HI 2 "register_operand" "r"))
! 	   (match_operand:SI 3 "register_operand" "0")]))]
    ""
!   "%c1.w\\t%T2,%f0"
    [(set_attr "cc" "clobber")
     (set_attr "length" "2")])
  
+ ;; ior:HI
+ 
  (define_insn "*iorhi3_ashift_8"
    [(set (match_operand:HI 0 "register_operand" "=r")
  	(ior:HI (ashift:HI (match_operand:HI 1 "register_operand" "r")
***************
*** 2808,2831 ****
  
  ;; ior:SI
  
- (define_insn "*iorsi3_zexthi"
-   [(set (match_operand:SI 0 "register_operand" "=r")
- 	(ior:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
- 		(match_operand:SI 2 "register_operand" "0")))]
-   "TARGET_H8300H || TARGET_H8300S"
-   "or.w\\t%T1,%f0"
-   [(set_attr "cc" "clobber")
-    (set_attr "length" "2")])
- 
- (define_insn "*iorsi3_zextqi"
-   [(set (match_operand:SI 0 "register_operand" "=r")
- 	(ior:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
- 		(match_operand:SI 2 "register_operand" "0")))]
-   ""
-   "or\\t%X1,%w0"
-   [(set_attr "cc" "clobber")
-    (set_attr "length" "2")])
- 
  (define_insn "*iorsi3_ashift_16"
    [(set (match_operand:SI 0 "register_operand" "=r")
  	(ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "r")
--- 2833,2838 ----
***************
*** 3032,3068 ****
  			  (const_int 65536))
  		 (match_dup 0)))]
    "operands[3] = gen_rtx_REG (HImode, REGNO (operands[2]));")
- 
- ;; xor:HI
- 
- (define_insn "*xorhi3_zextqi"
-   [(set (match_operand:HI 0 "register_operand" "=r")
- 	(xor:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
- 		(match_operand:HI 2 "register_operand" "0")))]
-   ""
-   "xor\\t%X1,%s0"
-   [(set_attr "cc" "clobber")
-    (set_attr "length" "2")])
- 
- ;; xor:SI
- 
- (define_insn "*xorsi3_zexthi"
-   [(set (match_operand:SI 0 "register_operand" "=r")
- 	(xor:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
- 		(match_operand:SI 2 "register_operand" "0")))]
-   "TARGET_H8300H || TARGET_H8300S"
-   "xor.w\\t%T1,%f0"
-   [(set_attr "cc" "clobber")
-    (set_attr "length" "2")])
- 
- (define_insn "*xorsi3_zextqi"
-   [(set (match_operand:SI 0 "register_operand" "=r")
- 	(xor:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
- 		(match_operand:SI 2 "register_operand" "0")))]
-   ""
-   "xor\\t%X1,%w0"
-   [(set_attr "cc" "clobber")
-    (set_attr "length" "2")])
  
  ;; ashift:SI
  
--- 3039,3044 ----



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