[PATCH] Better Function Prologue and Epilogue for sh

[tm_gccmail@mail.kloo.net]

On Wed, 25 Jun 2003, Joern Rennecke wrote:

> The delay slot of the rts instruction is a nice place for a memory instruction;
> having the stack adjust there wastes an opportunity to put a load there.
> lds is type CO - i.e. it can't be paired with anything - and using it to load
> from a register takes just as long as loading from memory.  Likewise for sts.
> Thus, splitting the pr save/restore effectively creates a new memory access
> operation, which cannot be cheaper than sequestering one memory operation
> behind a barrier.

On the SH4, the entire epilogue will single-issue because of back-to-back
LS group instructions.

If the stack adjust is moved to the last instruction, then it
should create an opportunity for the instruction scheduler to interleave
non-LS group instructions between the LS group instructions.

I would assume it's worth creating one new non-LS group instruction so we
can potentially use the 8 or so wasted half-clocks between the stores.

Toshi