[patch] h8300.md: Add a new pattern.

Kazu Hirata kazu@cs.umass.edu
Thu Feb 20 12:52:00 GMT 2003


Hi,

Attached is a patch to add a new pattern.

The pattern catches (A & 0xffffff00) | B, where A is in SImode and B
in QImode.  In terms of assembly code,

	and	#0,r5l
	mov.b	@(287,er7),r0l
	or	r0l,r5l

becomes

	mov.b	@(287,er7),r5l

This way the temporary "r0l" is not needed.

Tested on h8300 port.  Committed.

Kazu Hirata

2003-02-20  Kazu Hirata  <kazu@cs.umass.edu>

	* config/h8300/h8300.md (*iorsi3_w): New.

Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.171
diff -u -r1.171 h8300.md
--- h8300.md	19 Feb 2003 17:47:18 -0000	1.171
+++ h8300.md	20 Feb 2003 12:20:40 -0000
@@ -2821,6 +2821,16 @@
   "operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));
    operands[4] = gen_rtx_REG (HImode, REGNO (operands[2]));")
 
+(define_insn "*iorsi3_w"
+  [(set (match_operand:SI 0 "register_operand" "=r,&r")
+	(ior:SI (and:SI (match_operand:SI 1 "register_operand" "0,0")
+			(const_int -256))
+		(zero_extend:SI (match_operand:QI 2 "general_operand_src" "r,g>"))))]
+  "TARGET_H8300H || TARGET_H8300S"
+  "mov.b\\t%X2,%w0"
+  [(set_attr "length" "2,8")
+   (set_attr "cc" "clobber,clobber")])
+
 (define_insn "*iorsi3_ashift_31"
   [(set (match_operand:SI 0 "register_operand" "=&r")
 	(ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "r")



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