Convert PowerPC MD to use CLZ

David Edelsohn dje@watson.ibm.com
Sat Feb 8 01:52:00 GMT 2003


	This patch converts the cntlz patterns in the machine description
from UNSPEC to use the new CLZ code.

David

	* config/rs6000/rs6000.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
	* config/rs6000/rs6000.md (clzsi2): Rename from cntlzw2.
	(ffssi2): Use clz instead of unspec.
	(clzdi2): Rename from cntlzd2.
	(ffsdi2): Use clz instead of unspec.

Index: rs6000.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.249
diff -c -p -r1.249 rs6000.h
*** rs6000.h	31 Jan 2003 23:34:16 -0000	1.249
--- rs6000.h	7 Feb 2003 23:07:13 -0000
*************** do {									     \
*** 2270,2275 ****
--- 2270,2279 ----
     is done just by pretending it is already truncated.  */
  #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
  
+ /* The cntlzw and cntlzd instructions return 32 and 64 for zero.  */
+ #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
+   ((VALUE) = ((MODE) == SImode ? 32 : 64))
+ 
  /* Specify the machine mode that pointers have.
     After generation of rtl, the compiler makes no further distinction
     between pointers and any other objects of this machine mode.  */
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.233
diff -c -p -r1.233 rs6000.md
*** rs6000.md	30 Jan 2003 13:19:15 -0000	1.233
--- rs6000.md	7 Feb 2003 23:07:13 -0000
***************
*** 2371,2377 ****
     (parallel [(set (match_dup 3) (and:SI (match_dup 1)
                                           (match_dup 2)))
                (clobber (scratch:CC))])
!    (set (match_dup 4) (unspec:SI [(match_dup 3)] 21))
     (set (match_operand:SI 0 "gpc_reg_operand" "=r")
          (minus:SI (const_int 32) (match_dup 4)))]
    ""
--- 2371,2377 ----
     (parallel [(set (match_dup 3) (and:SI (match_dup 1)
                                           (match_dup 2)))
                (clobber (scratch:CC))])
!    (set (match_dup 4) (clz:SI (match_dup 3)))
     (set (match_operand:SI 0 "gpc_reg_operand" "=r")
          (minus:SI (const_int 32) (match_dup 4)))]
    ""
***************
*** 2381,2389 ****
       operands[4] = gen_reg_rtx (SImode);
    })
    
! (define_insn "cntlzw2"
    [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
!         (unspec:SI [(match_operand:SI 1 "gpc_reg_operand" "r")] 21))]
    ""
    "{cntlz|cntlzw} %0,%1")
  
--- 2381,2389 ----
       operands[4] = gen_reg_rtx (SImode);
    })
    
! (define_insn "clzsi2"
    [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
! 	(clz:SI (match_operand:SI 1 "gpc_reg_operand" "r")))]
    ""
    "{cntlz|cntlzw} %0,%1")
  
***************
*** 6746,6752 ****
     (parallel [(set (match_dup 3) (and:DI (match_dup 1)      
                                           (match_dup 2)))   
                (clobber (scratch:CC))])
!    (set (match_dup 4) (unspec:DI [(match_dup 3)] 21))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r")
          (minus:DI (const_int 64) (match_dup 4)))]
    "TARGET_POWERPC64"
--- 6746,6752 ----
     (parallel [(set (match_dup 3) (and:DI (match_dup 1)      
                                           (match_dup 2)))   
                (clobber (scratch:CC))])
!    (set (match_dup 4) (clz:DI (match_dup 3)))
     (set (match_operand:DI 0 "gpc_reg_operand" "=r")
          (minus:DI (const_int 64) (match_dup 4)))]
    "TARGET_POWERPC64"
***************
*** 6756,6764 ****
       operands[4] = gen_reg_rtx (DImode);
    })
  
! (define_insn "cntlzd2"
    [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
!         (unspec:DI [(match_operand:DI 1 "gpc_reg_operand" "r")] 21))]
    "TARGET_POWERPC64"
    "cntlzd %0,%1")
  
--- 6756,6764 ----
       operands[4] = gen_reg_rtx (DImode);
    })
  
! (define_insn "clzdi2"
    [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
! 	(clz:DI (match_operand:DI 1 "gpc_reg_operand" "r")))]
    "TARGET_POWERPC64"
    "cntlzd %0,%1")
  



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