PATCH:[darwin] fix load of a misaligned double word

[Dale Johannesen]

On Dec 22, 2003, at 4:42 PM, Andrew Pinski wrote:
> On Dec 22, 2003, at 16:39, Bradley Lucier wrote:
>> On Dec 22, 2003, at 7:34 PM, Andrew Pinski wrote:
>>
>>> This patch is fix the load/stores of double words (ld/std 
>>> instructions).
>>> The PPC ISA defines them as being always using 4 byte aligned 
>>> offsets.
>>> So the patch was to fix the output of the right asm but it looks like
>>> a side effect is that it the load and stores of doubles (lfd/stfd), 
>>> the offset
>>> also get aligned which causes this performance problem.
>>
>> At the risk of exposing too much of my ignorance here, how can the 
>> assembler tell whether 3(r4) is not aligned on any 4-byte, 8-byte, 
>> etc., boundary?  It depends on what is in r4, doesn't it?
>
> The offset (the 3 part) has to be 4 byte aligned, not the whole 
> address.
> Another way to put it: the offset has to be a multiple of 4.

Correct.  This is an architectural limitation; the instruction adds two 
implicit 0 bits at the
low end of the displacement.  This occurs only for ld/std, not lfd/stfd 
(go figure).