[PATCH] power2 and lfq/sfq with a[-1]

Andrew Pinski pinskia@physics.uc.edu
Thu Apr 3 16:23:00 GMT 2003


The following source code:
register double t1 __asm__("f0");
register double t2 __asm__("f1");
register double t3 __asm__("f2"), t4 __asm__("f3");
void t(double *a, double *b)
{
         t1 = a[-1];
         t2 = a[0];
         t3 = a[1];
         t4 = a[2];
         b[-1] = t1;
         b[0] = t2;
         b[1] = t3;
         b[2] = t4;
}
  produces with -mpower2:
.text
         .align 2
         .globl _t
_t:
         lfd f0,-8(r3)
         lfq f1,0(r3)
         lfd f3,16(r3)
         stfd f0,-8(r4)
         stfq f1,0(r4)
         stfd f3,16(r4)
         blr

With the attached patch it produces:
.text
         .align 2
         .globl _t
_t:
         lfq f0,-8(r3)
         lfq f2,8(r3)
         stfq f0,-8(r4)
         stfq f2,8(r4)
         blr
Which is shorter.

ChangeLog:

2003-04-03	Andrew Pinski <pinskia@physics.uc.edu>

	* config/rs6000/rs6000.c (addrs_ok_for_quad_peep): the addresses are 
okay if the addr2 is an register,
		offset1 is -8 and the register of addr1 is the same as addr2.
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Thanks,
Andrew Pinski


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