[PATCH, arm] Fix gcc.c-torture/execute/930628-1.c -O3 for Thumb
Momchil Velikov
velco@fadata.bg
Wed Oct 30 02:46:00 GMT 2002
On Wed, 30 Oct 2002 10:35:18 +0000
Richard Earnshaw <rearnsha@arm.com> wrote:
> > Hi,
> >
> > The testcase gcc.c-torture/execute/930628-1.c -O3 -funroll-loops
> > fails to compile on Thumb. The problem is that GCC generates
> > instunctions like `str r6,[r2,sp]' which are not valid address
> > combination on Thumb.
> >
> > SP is a valid base register but only with an immediate index. Since
> > THUMB_REGNO_MODE_OK_FOR_BASE_P yields true for SP,
> > find_reloads_address_1 does not reload this register. The only
> > solution I found was to manually reload either SP or the entire
> > address in LEGITIMIZE_RELOAD_ADDRESS.
> >
> > I reg-tested the patch with arm-sim/-mthumb. The two failures with
> > 930628-1.c have gone away.
> >
> I've been thinking about this particular case, but the fix is quite
> complex and involves introducing a new macro that allows the index reg
> class to be based both on the mode of access and the class of base
> register in use. Unfortunately I don't have a patch available for
> this yet.
Is it possible just to avoid using sp ?
~velco
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