Bug on PA-RISC
John David Anglin
dave@hiauly1.hia.nrc.ca
Thu May 30 23:28:00 GMT 2002
Jeff,
Here is a fix for the LO_SUM bug which we discussed before I went away.
It's corrects a "typo" in the DImode move pattern. The correction
is consistent with the approach used elsewhere to correct the problem
(ie., severely disparage copies from one floating register to another).
However, I must say that I don't like the fix as it causes really
bad code to be generated (load MEM to general register, then back
to stack, and then finally to FPR register).
There must be a better way. Possibly, we could delay allowing
LO_SUM MEMs in the pattern until after reload? Not sure whether
cse2 will do the combine if the source/target is a general register.
The asymmetric behavor of the instruction set with respect to
the floating and general registers is a pain.
I've tested the patch under hppa2.0w-hp-hpux11.11 with "-mpa-risc-2-0"
in BOOT_CFLAGS. There are still some fails that aren't there without
the option. For example,
Executing on host: /xxx/gnu/gcc-3.2/objdir/gcc/xgcc -B/xxx/gnu/gcc-3.2/objdir/gcc/ /xxx/gnu/gcc-3.2/gcc/gcc/testsuite/gcc.c-torture/execute/align-2.c -w -O2 -lm -o /xxx/gnu/gcc-3.2/objdir/gcc/testsuite/align-2.x2 (timeout = 300)
/xxx/gnu/gcc-3.2/gcc/gcc/testsuite/gcc.c-torture/execute/align-2.c: In function `main':
/xxx/gnu/gcc-3.2/gcc/gcc/testsuite/gcc.c-torture/execute/align-2.c:50: Internal compiler error in verify_wide_reg, at flow.c:543
Since you said that you were also testing a fix, I will hold off on applying
the patch.
Dave
--
J. David Anglin dave.anglin@nrc.ca
National Research Council of Canada (613) 990-0752 (FAX: 952-6605)
2002-05-31 John David Anglin <dave@hiauly1.hia.nrc.ca>
* pa.md: Severely disparage DImode copy between floating point
registers.
(umulsidi3): Change predicates using nonimmediate_operand to
register_operand. Delete uint32_operand variants.
Index: config/pa/pa.md
===================================================================
RCS file: /cvsroot/gcc/gcc/gcc/config/pa/pa.md,v
retrieving revision 1.107
diff -u -3 -p -r1.107 pa.md
--- config/pa/pa.md 13 May 2002 04:50:15 -0000 1.107
+++ config/pa/pa.md 31 May 2002 05:05:45 -0000
@@ -3246,9 +3246,9 @@
(define_insn ""
[(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand"
- "=r,o,Q,r,r,r,f,f,*TR")
+ "=r,o,Q,r,r,r,!f,f,*TR")
(match_operand:DI 1 "general_operand"
- "rM,r,r,o*R,Q,i,fM,*TR,f"))]
+ "rM,r,r,o*R,Q,i,!fM,*TR,f"))]
"(register_operand (operands[0], DImode)
|| reg_or_0_operand (operands[1], DImode))
&& ! TARGET_64BIT
@@ -4042,29 +4042,11 @@
}")
(define_insn "umulsidi3"
- [(set (match_operand:DI 0 "nonimmediate_operand" "=f")
- (mult:DI (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "f"))
- (zero_extend:DI (match_operand:SI 2 "nonimmediate_operand" "f"))))]
+ [(set (match_operand:DI 0 "register_operand" "=f")
+ (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f"))
+ (zero_extend:DI (match_operand:SI 2 "register_operand" "f"))))]
"TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
"xmpyu %1,%2,%0"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "4")])
-
-(define_insn ""
- [(set (match_operand:DI 0 "nonimmediate_operand" "=f")
- (mult:DI (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "f"))
- (match_operand:DI 2 "uint32_operand" "f")))]
- "TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT && !TARGET_64BIT"
- "xmpyu %1,%R2,%0"
- [(set_attr "type" "fpmuldbl")
- (set_attr "length" "4")])
-
-(define_insn ""
- [(set (match_operand:DI 0 "nonimmediate_operand" "=f")
- (mult:DI (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "f"))
- (match_operand:DI 2 "uint32_operand" "f")))]
- "TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT && TARGET_64BIT"
- "xmpyu %1,%2R,%0"
[(set_attr "type" "fpmuldbl")
(set_attr "length" "4")])
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