PATCH: gcc-3.1/changes.html tweaks
Gerald Pfeifer
pfeifer@dbai.tuwien.ac.at
Sun May 5 01:36:00 GMT 2002
Use "back end" instead of "back-end". Break overly longs and reduce
whitespace.
(The version of the patch below omits the whitespace changes.)
Gerald
Index: changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-3.1/changes.html,v
retrieving revision 1.36
diff -u -3 -p -w -r1.36 changes.html
--- changes.html 4 May 2002 19:48:29 -0000 1.36
+++ changes.html 5 May 2002 08:35:22 -0000
@@ -40,8 +40,9 @@
</li>
<li><p><a href="http://www.suse.de/~aj/SPEC/">SPEC2000</a> and <a
- href="http://people.redhat.com/dnovillo/SPEC/">SPEC95</a> benchmark suites
- are now used daily to monitor performance of the generated code.</p>
+ href="http://people.redhat.com/dnovillo/SPEC/">SPEC95</a> benchmark
+ suites are now used daily to monitor performance of the generated
+ code.</p>
<p>According to the SPECInt2000 results on an AMD Athlon CPU, the code
generated by GCC 3.1 is 6% faster on the average (8.2% faster with
@@ -207,8 +208,8 @@ progress.
<ul>
<li>Hans-Peter Nilsson has contributed a port to <a
href="http://www-cs-faculty.stanford.edu/~knuth/mmix.html">MMIX</a>,
- the CPU architecture used in new editions of Donald E. Knuth's <em>The Art
- of Computer Programming</em>.</li>
+ the CPU architecture used in new editions of Donald E. Knuth's <em>The
+ Art of Computer Programming</em>.</li>
<li><a href="http://www.axis.com/">Axis Communications</a> has
contributed its port to the CRIS CPU architecture, used in the ETRAX
@@ -224,7 +225,7 @@ progress.
<li>UltraSPARC is fully supported in 64-bit mode. The option
<code>-m64</code> enables it.</li>
-<li>The x86 back-end has had some noticeable work done to it.
+<li>The x86 back end has had some noticeable work done to it.
<ul>
<li><a href="http://www.suse.com/">SuSE Labs</a> developers Jan
Hubicka, Bo Thorsen and Andreas Jaeger have contributed a port to
@@ -242,14 +243,15 @@ progress.
Refer to the documentation on <code>-march=</code> and
<code>-mcpu=</code> options for details.</li>
- <li>For those targets that support it, <code>-mfpmath=sse</code> will
- cause the compiler to generate SSE/SSE2 instructions for floating point
- math instead of x87 instructions. Usually, this will lead to quicker
- code — especially on the Pentium 4. Note that only scalar floating
- point instructions are used and GCC does not exploit SIMD features yet.</li>
+ <li>For those targets that support it, <code>-mfpmath=sse</code>
+ will cause the compiler to generate SSE/SSE2 instructions for
+ floating point math instead of x87 instructions. Usually, this
+ will lead to quicker code — especially on the Pentium
+ 4. Note that only scalar floating point instructions are used
+ and GCC does not exploit SIMD features yet.</li>
- <li>Prefetch support has been added to the Pentium III, Pentium 4, K6-2, K6-3, and
- Athlon series.</li>
+ <li>Prefetch support has been added to the Pentium III, Pentium 4,
+ K6-2, K6-3, and Athlon series.</li>
<li>Code generated for floating point to integer converisons has been
improved leading to better performance of many 3D applications.</li>
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