HP-UX IA64 ILP32 patch

[Richard Henderson]

On Fri, Jun 14, 2002 at 12:26:48PM -0700, Steve Ellcey wrote:
> +   rtx scratch = operands[2];
> +   if (!reload_completed)
> +     gen_reg_rtx (ptr_mode);

Typo.

> ! (define_insn "*load_di_fptr_internal1"
>     [(set (match_operand:DI 0 "register_operand" "=r")
>   	(plus:DI (reg:DI 1) (match_operand:DI 1 "function_operand" "s")))]
>     ""
>     "addl %0 = @ltoff(@fptr(%1)), gp"
>     [(set_attr "itanium_class" "ialu")])
>   
> ! (define_insn "*load_si_fptr_internal1"
> !   [(set (match_operand:DI 0 "register_operand" "=r")
> ! 	(plus:DI (reg:DI 1) (match_operand:SI 1 "function_operand" "s")))]
> !   ""
> !   "addl %0 = @ltoff(@fptr(%1)), gp"
> !   [(set_attr "itanium_class" "ialu")])

Could also just remove the mode check on op1.

> ! (define_insn "load_di_gprel"
>     [(set (match_operand:DI 0 "register_operand" "=r")
>   	(plus:DI (reg:DI 1) (match_operand:DI 1 "sdata_symbolic_operand" "s")))]
>     ""
>     "addl %0 = @gprel(%1), gp"
>     [(set_attr "itanium_class" "ialu")])
>   
> + (define_insn "load_si_gprel"
> +   [(set (match_operand:DI 0 "register_operand" "=r")
> + 	(plus:DI (reg:DI 1) (match_operand:SI 1 "sdata_symbolic_operand" "s")))]
> +   ""
> +   "addl %0 = @gprel(%1), gp"
> +   [(set_attr "itanium_class" "ialu")])

Likewise.

> ! (define_insn "*load_symptr_di_internal1"
>     [(set (match_operand:DI 0 "register_operand" "=r")
>   	(plus:DI (reg:DI 1) (match_operand:DI 1 "got_symbolic_operand" "s")))]
>     ""
>     "addl %0 = @ltoff(%1), gp"
>     [(set_attr "itanium_class" "ialu")])
>   
> + (define_insn "*load_symptr_si_internal1"
> +   [(set (match_operand:DI 0 "register_operand" "=r")
> + 	(plus:DI (reg:DI 1) (match_operand:SI 1 "got_symbolic_operand" "s")))]
> +   ""
> +   "addl %0 = @ltoff(%1), gp"
> +   [(set_attr "itanium_class" "ialu")])

Likewise.

> ! (define_insn "call_di_pic"
>     [(call (mem:DI (match_operand:DI 0 "call_operand" "b,i"))
> + 	 (match_operand 1 "" ""))
> +    (use (unspec [(reg:DI 1)] UNSPEC_PIC_CALL))
> +    (clobber (match_operand:DI 2 "register_operand" "=b,b"))]
> +   ""
> +   "br.call%+.many %2 = %0"
> +   [(set_attr "itanium_class" "br,scall")])
> + 
> + (define_insn "call_si_pic"
> +   [(call (mem:SI (match_operand:SI 0 "call_operand" "b,i"))

Likewise.

> +       else if (!TARGET_NO_PIC && symbolic_operand (op1, SImode))

Use VOIDmode to share the two code blocks.



r~