[RFC] PowerPC DFA description

Vladimir Makarov vmakarov@redhat.com
Fri Jun 7 06:44:00 GMT 2002

David Edelsohn wrote:
> >>>>> Vladimir Makarov writes:
> Vlad> You are absolutely
> Vlad> correctly understand the DFA syntax.  It looks like incorrect
> Vlad> description of the processor.  You also propose the right solution
> Vlad> (replacing mciu_iter by mciu).
>         I have rearranged the DFA descriptions into a separate file for
> each group of similar processors, like the other GCC architectures which
> have been converted.
>         I performed a comparison of some benchmarks compiled for PPC604e
> processor with the corrected DFA description, with the corrected DFA
> description removing dispatch modeling, with the original scheduling
> description.  (The DFA description without modeling the dispatch unit
> should be equivalent to a direct translation of the original scheduling
> description to DFA language.)
>         The results are: original description best, DFA translation 1%
> slower, DFA with dispatch 3-4% slower.

  You could start with the original description translated into DFA
description.  In this case you should have the same generated code.  If
it is not then something is wrong and we should fix this discrepancy. 
Jeff Law worked hard to get the same code.

  Also you will never have problem with size of DFA and its building
time for the translated old description.

  Writing the DFA description is not easy task and requires some
experience.  Sometimes I thought the description is more accurate, but
the generated code was worse.  The old descriptions might be adequate
for some processors (especially for OOO ones).

  For some tests, even a ggod description might generate worse code.
E.g. the scheduler finds more parallelism and moves insns further
increasing register pressure which results in register spilling.
>         Why does one need to model dispatch if issue rate is specified?  I
> can understand modeling dispatch for Altivec on PPC7450 where only two
> instructions can get dispatched to four sub-units per cycle, but general
> dispatch modeling seems redundant.  I don't see that modeled for other
> DFA descriptions contributed to GCC.

  Generally speaking, the rate hook is redundant if you described
dispatch unit.  But you could also ignore dispatch units and define
correct issue rate.  MHO, it is better to have the rate description in
the same place (in the DFA description).


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