Athlon SSE optimization

[Jan Hubicka]

Hi,
Intel recommends to use xorp for clearing registers, while Athlon
preffers the properly typed xor to reduce code size.

Honza

Mon Jul 15 16:40:19 CEST 2002  Jan Hubicka  <jh@suse.cz>
	* i386.md (movss, movsd): Use xorps/xorpd for Athlon.

Index: i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.376
diff -c -3 -p -r1.376 i386.md
*** i386.md	3 Jul 2002 17:02:39 -0000	1.376
--- i386.md	10 Jul 2002 19:01:14 -0000
***************
*** 2129,2135 ****
      case 4:
        return "mov{l}\t{%1, %0|%0, %1}";
      case 5:
!       if (TARGET_SSE2)
  	return "pxor\t%0, %0";
        else
  	return "xorps\t%0, %0";
--- 2129,2135 ----
      case 4:
        return "mov{l}\t{%1, %0|%0, %1}";
      case 5:
!       if (TARGET_SSE2 && !TARGET_ATHLON)
  	return "pxor\t%0, %0";
        else
  	return "xorps\t%0, %0";
***************
*** 2315,2321 ****
      case 4:
        return "#";
      case 5:
!       return "pxor\t%0, %0";
      case 6:
        if (TARGET_PARTIAL_REG_DEPENDENCY)
  	return "movapd\t{%1, %0|%0, %1}";
--- 2315,2324 ----
      case 4:
        return "#";
      case 5:
!       if (TARGET_ATHLON)
!         return "xorpd\t%0, %0";
!       else
!         return "pxor\t%0, %0";
      case 6:
        if (TARGET_PARTIAL_REG_DEPENDENCY)
  	return "movapd\t{%1, %0|%0, %1}";
***************
*** 2374,2380 ****
        return "#";
  
      case 5:
!       return "pxor\t%0, %0";
      case 6:
        if (TARGET_PARTIAL_REG_DEPENDENCY)
  	return "movapd\t{%1, %0|%0, %1}";
--- 2377,2386 ----
        return "#";
  
      case 5:
!       if (TARGET_ATHLON)
!         return "xorpd\t%0, %0";
!       else
!         return "pxor\t%0, %0";
      case 6:
        if (TARGET_PARTIAL_REG_DEPENDENCY)
  	return "movapd\t{%1, %0|%0, %1}";