MIPS patch: allow ints in FPRs, rework some float patterns

[Richard Sandiford]

Hans-Peter Nilsson <hp@bitrange.com> writes:
> On 9 Jul 2002, Richard Sandiford wrote:
> > The main problem with extending it to 64-bit integers is the lack
> > of automatic sign extension.  When 32-bit values are stored in 64-bit
> > float registers, the upper 32 bits are left undefined.  So the
> > definition of LOAD_EXTEND_OP doesn't hold:
> >
> >     #define LOAD_EXTEND_OP(MODE) \
> >       (TARGET_64BIT && ((MODE) == SImode || (MODE) == CCmode) \
> >        ? SIGN_EXTEND : ZERO_EXTEND)
> >
> > I've tried to avoid the problem by including 64-bit FPRs in
> > CLASS_CANNOT_CHANGE_MODE.  Is that the right thing to do?
> > Is it going to be enough?
> 
> Wouldn't it help to augment LOAD_EXTEND_OP to return NIL for
> DFmode, SFmode (et. al.)?  Random though, beware of nonsense.

I believe LOAD_EXTEND_OP only applies to integer modes.  The
problem (after the patch) is that you can load SImode values
into float regs too, and later access the float regs in DImode.
The upper 32 bits aren't defined if you do that.

Richard