Add minimal traceback table and prefetch to rs6000.

[David Edelsohn]

>>>>> Richard Henderson writes:

Richard> Should be either 

Richard> (match_operand:SI 0 "register_operand" "r")
Richard> or
Richard> (match_operand:SI 0 "address_operand" "p")

Richard> unless you have a compelling reason to do otherwise.

	Two conflicting issues: The operand must be an address, not just a
register.  PowerPC dcbt/dcbtst instructions only allow addresses in the
reg+reg indexed form.  I could not find a way to force GCC to only
generate indexed RTL and emit an indexed address for this instruction.
When I tried to restrict the predicate, I received instruction recognition
ICEs.

	So, the predicate accepts an address and then I force the address
into a single register for use with the special r0 form of the dcbt/dcbtst
instructions. 

	I would be happy to hear any ideas of how to work around this.
The predicate must restrict the operand to an address, but further
restrictions failed in the variants I tried.  If I could force GCC to
always generate an indexed address for this, that would be great, but
there is no current way to distinguish the legitimate address for this
instruction from other addresses for this architecture based on RTL code.

	MEMs at least have "o", etc., but there is no similar register
constraint for addresses, and no indexed constraint.  There aren't many
port-specific constraint letters left and I wasn't sure if it would be
effective.

Thanks, David