ia64 __builtin_trap

[Richard Henderson]

Implemented this while testing fixes for DaveM's sparc
conditional trap failure, since the 4P lion is somewhat
faster than the 1P ultra5...


r~


        * config/ia64/ia64.md (trap, conditional_trap): New.

Index: gcc/config/ia64/ia64.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ia64/ia64.md,v
retrieving revision 1.79.2.1
diff -c -p -d -r1.79.2.1 ia64.md
*** gcc/config/ia64/ia64.md	31 Mar 2002 00:12:34 -0000	1.79.2.1
--- gcc/config/ia64/ia64.md	18 Apr 2002 19:39:54 -0000
***************
*** 5045,5050 ****
--- 5045,5081 ----
    [(set_attr "itanium_class" "stop_bit")
     (set_attr "predicable" "no")])
  
+ (define_expand "trap"
+   [(trap_if (const_int 1) (const_int 0))]
+   ""
+   "")
+ 
+ ;; ??? We don't have a match-any slot type.  Setting the type to unknown
+ ;; produces worse code that setting the slot type to A.
+ 
+ (define_insn "*trap"
+   [(trap_if (const_int 1) (match_operand 0 "const_int_operand" ""))]
+   ""
+   "break %0"
+   [(set_attr "itanium_class" "chk_s")])
+ 
+ (define_expand "conditional_trap"
+   [(trap_if (match_operand 0 "" "") (match_operand 1 "" ""))]
+   ""
+ {
+   operands[0] = ia64_expand_compare (GET_CODE (operands[0]), VOIDmode);
+ })
+ 
+ (define_insn "*conditional_trap"
+   [(trap_if (match_operator 0 "predicate_operator"
+ 	      [(match_operand:BI 1 "register_operand" "c")
+ 	       (const_int 0)])  
+ 	    (match_operand 2 "const_int_operand" ""))]
+   ""
+   "(%j0) break %2"
+   [(set_attr "itanium_class" "chk_s")
+    (set_attr "predicable" "no")])
+ 
  (define_insn "break_f"
    [(unspec_volatile [(const_int 0)] 3)]
    ""