[patch] h8300.md: Fix a description of cc0.

[Kazu Hirata]

Hi,

Attached is a patch to fix a description of cc0 in
config/h8300/h8300.md.  In the pattern movsi_h8300hs, alternative 2
accepts both immediate and memory operand.  While loading a memory
operand sets cc0 accordingly, loading a immediate may not do so
because loading -1, for example, is treated using subs, which does not
set cc0 at all.  Thus the patch splits alternative 2 into two parts,
which in turn causes the alternative numbers to bump up.

I think this kind of thing should not matter usually when cse is doing
a good job.  However, lack of this has caused a testsuite failure in
2.95.3.test4.  (Inlining a function seems to explit this bug.)

OK to apply to 2.95 branch, 3.0 branch, and mainline?

Thanks,

Kazu Hirata

2001-03-05  Kazu Hirata  <kazu@hxi.com>

	* config/h8300/h8300.md (movsi_h8300hs): Split alternative 2 into
	two parts to have correct cc0 for each alternative.

Index: h8300.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/h8300/h8300.md,v
retrieving revision 1.26
diff -c -r1.26 h8300.md
*** h8300.md	2001/02/21 18:09:48	1.26
--- h8300.md	2001/03/06 01:13:14
***************
*** 399,406 ****
     (set_attr "cc" "clobber")])
  
  (define_insn "movsi_h8300hs"
!   [(set (match_operand:SI 0 "general_operand_dst" "=r,r,r,m,<,r,*a,*a,r")
! 	(match_operand:SI 1 "general_operand_src" "I,r,im,r,r,>,I,r,*a"))]
    "(TARGET_H8300S || TARGET_H8300H)
     && (register_operand (operands[0], SImode)
         || register_operand (operands[1], SImode))"
--- 399,406 ----
     (set_attr "cc" "clobber")])
  
  (define_insn "movsi_h8300hs"
!   [(set (match_operand:SI 0 "general_operand_dst" "=r,r,r,r,m,<,r,*a,*a,r")
! 	(match_operand:SI 1 "general_operand_src" "I,r,i,m,r,r,>,I,r,*a"))]
    "(TARGET_H8300S || TARGET_H8300H)
     && (register_operand (operands[0], SImode)
         || register_operand (operands[1], SImode))"
***************
*** 410,420 ****
      {
      case 0:
        return \"sub.l	%S0,%S0\";
-     case 6:
-       return \"clrmac\";
      case 7:
!       return \"clrmac\;ldmac %1,macl\";
      case 8:
        return \"stmac	macl,%0\";
      default:
        if (GET_CODE (operands[1]) == CONST_INT)
--- 410,420 ----
      {
      case 0:
        return \"sub.l	%S0,%S0\";
      case 7:
!       return \"clrmac\";
      case 8:
+       return \"clrmac\;ldmac %1,macl\";
+     case 9:
        return \"stmac	macl,%0\";
      default:
        if (GET_CODE (operands[1]) == CONST_INT)
***************
*** 446,453 ****
      }
     return \"mov.l	%S1,%S0\";
  }"
!   [(set_attr "length" "2,2,10,10,4,4,2,6,4")
!    (set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv,none_0hit,none_0hit,set_znv")])
  
  (define_insn "movsf_h8300h"
    [(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,m,<,r")
--- 446,453 ----
      }
     return \"mov.l	%S1,%S0\";
  }"
!   [(set_attr "length" "2,2,10,10,10,4,4,2,6,4")
!    (set_attr "cc" "set_zn,set_znv,clobber,set_znv,set_znv,set_znv,set_znv,none_0hit,none_0hit,set_znv")])
  
  (define_insn "movsf_h8300h"
    [(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,m,<,r")