S/390 backend documentation
Hartmut Penner
hpenner@tonto.boeblingen.de.ibm.com
Mon Jul 30 06:36:00 GMT 2001
Following changes will installed:
Index: ChangeLog
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ChangeLog,v
retrieving revision 1.10831
diff -c -p -r1.10831 ChangeLog
*** ChangeLog 2001/07/30 10:54:04 1.10831
--- ChangeLog 2001/07/30 13:29:48
***************
*** 1,3 ****
--- 1,10 ----
+ 2001-07-30 Hartmut Penner <hpenner@de.ibm.com>
+
+ * doc/install.texi: Add s390 and s390x as new targets.
+ * doc/invoke.texi: Add documantation of S/390 and zSeries
+ target options.
+ * doc/md.texi: Add documantation of S/390 and zSeries constraints.
+
Mon Jul 30 12:52:11 CEST 2001 Jan Hubicka <jh@suse.cz>
* combine.c (try_combine): Avoid barrier after noop jumps.
Index: doc/install.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/install.texi,v
retrieving revision 1.49
diff -c -p -r1.49 install.texi
*** install.texi 2001/07/27 08:48:38 1.49
--- install.texi 2001/07/30 13:29:49
*************** GNU Compiler Collection on your machine.
*** 1375,1380 ****
--- 1375,1384 ----
@item
@uref{#romp-*-aos,,romp-*-aos, romp-*-mach}
@item
+ @uref{#s390-*-linux*}
+ @item
+ @uref{#s390x-*-linux*}
+ @item
@uref{#*-*-solaris*,,*-*-solaris*}
@item
@uref{#sparc-sun-solaris*,,sparc-sun-solaris*}
*************** with @command{hc}, the Metaware compiler
*** 2925,2930 ****
--- 2929,2948 ----
mismatches between the stage 2 and stage 3 compilers in various files.
These errors are minor differences in some floating-point constants and
can be safely ignored; the stage 3 compiler is correct.
+
+ @html
+ </p>
+ <hr>
+ @end html
+ @heading @anchor{s390-*-linux*}s390-*-linux*
+ S/390 system running Linux for S/390@.
+
+ @html
+ </p>
+ <hr>
+ @end html
+ @heading @anchor{s390x-*-linux*}s390x-*-linux*
+ zSeries system (64 Bit) running Linux for zSeries@.
@html
</p>
Index: doc/invoke.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.40
diff -c -p -r1.40 invoke.texi
*** invoke.texi 2001/07/26 13:59:22 1.40
--- invoke.texi 2001/07/30 13:29:53
*************** in the following sections.
*** 577,582 ****
--- 577,588 ----
-minline-divide-max-throughput -mno-dwarf2-asm @gol
-mfixed-range=@var{register-range}}
+ @emph{S/390 and zSeries Options}
+ @gccoptlist{
+ -mhard-float -msoft-float -mbackchain -mno-backchain @gol
+ -msmall-exec -mno-small-exec -mmvcle -mno-mvcle @gol
+ -m64 -m31 -mdebug -mno-debug}
+
@item Code Generation Options
@xref{Code Gen Options,,Options for Code Generation Conventions}.
@gccoptlist{
*************** that macro, which enables you to change
*** 5083,5088 ****
--- 5089,5095 ----
* MCore Options::
* IA-64 Options::
* D30V Options::
+ * S/390 and zSeries Options::
@end menu
@node M680x0 Options
*************** The default is 2.
*** 8975,8980 ****
--- 8982,9052 ----
Specify the maximum number of conditionally executed instructions that
replace a branch. The default is 4.
@end table
+
+ @node S/390 and zSeries Options
+ @subsection S/390 and zSeries Options
+ @cindex S/390 and zSeries Options
+
+ These are the @samp{-m} options defined for the S/390 and zSeries architecture.
+
+ @table @gcctabopt
+ @item -mhard-float
+ @itemx -msoft-float
+ @opindex mhard-float
+ @opindex msoft-float
+ Use (do not use) the hardware floating-point instructions and registers
+ for floating-point operations. When @option{-msoft-float} is specified,
+ functions in @file{libgcc.a} will be used to perform floating-point
+ operations. When @option{-mhard-float} is specified, the compiler
+ generates IEEE floating-point instructions. This is the default.
+
+ @item -mbackchain
+ @itemx -mno-backchain
+ @opindex mbackchain
+ @opindex mno-backchain
+ Generate (or do not generate) code which maintains an explicit
+ backchain within the stack frame that points to the caller's frame.
+ This is currently needed to allow debugging. The default is to
+ generate the backchain.
+
+ @item -msmall-exec
+ @itemx -mno-small-exec
+ @opindex msmall-exec
+ @opindex mno-small-exec
+ Generate (or do not generate) code using the @code{bras} instruction
+ to do subroutine calls.
+ This only works reliably if the total executable size does not
+ exceed 64k. The default is to use the @code{basr} instruction instead,
+ which does not have this limitation.
+
+ @item -m64
+ @itemx -m31
+ @opindex m64
+ @opindex m31
+ When @option{-m31} is specified, generate code compliant to the
+ Linux for S/390 ABI@. When @option{-m64} is specified, generate
+ code compliant to the Linux for zSeries ABI@. This allows GCC in
+ particular to generate 64-bit instructions. For the @samp{s390}
+ targets, the default is @option{-m31}, while the @samp{s390x}
+ targets default to @option{-m64}.
+
+ @item -mmvcle
+ @itemx -mno-mvcle
+ @opindex mmvcle
+ @opindex mno-mvcle
+ Generate (or do not generate) code using the @code{mvcle} instruction
+ to perform block moves. When @option{-mno-mvcle} is specifed,
+ use a @code{mvc} loop instead. This is the default.
+
+ @item -mdebug
+ @itemx -mno-debug
+ @opindex mdebug
+ @opindex mno-debug
+ Print (or do not print) additional debug information when compiling.
+ The default is to not print debug information.
+
+ @end table
+
@node Code Gen Options
@section Options for Code Generation Conventions
Index: doc/md.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/md.texi,v
retrieving revision 1.17
diff -c -p -r1.17 md.texi
*** md.texi 2001/07/22 21:42:35 1.17
--- md.texi 2001/07/30 13:29:55
*************** Direct memory reference
*** 1963,1968 ****
--- 1963,2000 ----
Symbolic address
@end table
+
+ @item S/390 and zSeries---@file{s390.h}
+ @table @code
+ @item a
+ Address register (general purpose register except r0)
+
+ @item d
+ Data register (arbitrary general purpose register)
+
+ @item f
+ Floating-point register
+
+ @item I
+ Unsigned 8-bit constant (0--255)
+
+ @item J
+ Unsigned 12-bit constant (0--4095)
+
+ @item K
+ Signed 16-bit constant (@minus{}32768--32767)
+
+ @item L
+ Unsigned 16-bit constant (0--65535)
+
+ @item Q
+ Memory reference without index register
+
+ @item S
+ Symbolic constant suitable for use with the @code{larl} instruction
+
+ @end table
+
@end table
@ifset INTERNALS
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