i386 constraint cleanup
Jan Hubicka
jh@suse.cz
Thu Feb 15 05:04:00 GMT 2001
Hi
If the last regclass patch get accepted, installing this would bring me
great feeling of satisfaction. I've measured notable improvements on SSE
code, but also some improvements w/o it due to improved fp/integer register
allocation. The purpose is that regclass now sees that if it places reg
A in SSE unit, then all registers used together with reg A should be
in SSE too.
If some other port want to do the same, here is the script:
/match_operand/ s/\#[^",]*,/,/g
/match_operand/ s/\#[^",]*"/"/g
Honza
Thu Feb 15 13:52:54 CET 2001 Jan Hubicka <jh@suse.cz>
* i386.md (fp patterns): Remove the '#' register allocator garbage.
Index: i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.217
diff -c -3 -p -r1.217 i386.md
*** i386.md 2001/02/15 09:57:21 1.217
--- i386.md 2001/02/15 12:48:52
***************
*** 1514,1521 ****
(define_insn "*cmpfp_i_sse"
[(set (reg:CCFP 17)
! (compare:CCFP (match_operand 0 "register_operand" "f#x,x#f")
! (match_operand 1 "nonimmediate_operand" "f#x,xm#f")))]
"TARGET_80387
&& SSE_FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
--- 1514,1521 ----
(define_insn "*cmpfp_i_sse"
[(set (reg:CCFP 17)
! (compare:CCFP (match_operand 0 "register_operand" "f,x")
! (match_operand 1 "nonimmediate_operand" "f,xm")))]
"TARGET_80387
&& SSE_FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
***************
*** 1550,1557 ****
(define_insn "*cmpfp_iu_sse"
[(set (reg:CCFPU 17)
! (compare:CCFPU (match_operand 0 "register_operand" "f#x,x#f")
! (match_operand 1 "nonimmediate_operand" "f#x,xm#f")))]
"TARGET_80387
&& SSE_FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
--- 1550,1557 ----
(define_insn "*cmpfp_iu_sse"
[(set (reg:CCFPU 17)
! (compare:CCFPU (match_operand 0 "register_operand" "f,x")
! (match_operand 1 "nonimmediate_operand" "f,xm")))]
"TARGET_80387
&& SSE_FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
***************
*** 2149,2155 ****
(define_insn "*pushsf"
[(set (match_operand:SF 0 "push_operand" "=<,<,<")
! (match_operand:SF 1 "general_no_elim_operand" "f#rx,rFm#fx,x#rf"))]
""
"*
{
--- 2149,2155 ----
(define_insn "*pushsf"
[(set (match_operand:SF 0 "push_operand" "=<,<,<")
! (match_operand:SF 1 "general_no_elim_operand" "f,rFm,x"))]
""
"*
{
***************
*** 2198,2205 ****
(set (mem:SF (reg:SI 7)) (match_dup 1))])
(define_insn "*movsf_1"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=f#xr,m,f#xr,r#xf,m,x#rf,m")
! (match_operand:SF 1 "general_operand" "fm#rx,f#rx,G,rmF#fx,Fr#fx,xm#rf,x#rf"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& (reload_in_progress || reload_completed
|| GET_CODE (operands[1]) != CONST_DOUBLE
--- 2198,2205 ----
(set (mem:SF (reg:SI 7)) (match_dup 1))])
(define_insn "*movsf_1"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=f,m,f,r,m,x,m")
! (match_operand:SF 1 "general_operand" "fm,f,G,rmF,Fr,xm,x"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& (reload_in_progress || reload_completed
|| GET_CODE (operands[1]) != CONST_DOUBLE
***************
*** 2293,2299 ****
(define_insn "*pushdf_nointeger"
[(set (match_operand:DF 0 "push_operand" "=<,<,<,<")
! (match_operand:DF 1 "general_no_elim_operand" "f#Y,Fo#fY,*r#fY,Y#f"))]
"!TARGET_INTEGER_DFMODE_MOVES"
"*
{
--- 2293,2299 ----
(define_insn "*pushdf_nointeger"
[(set (match_operand:DF 0 "push_operand" "=<,<,<,<")
! (match_operand:DF 1 "general_no_elim_operand" "f,Fo,*r,Y"))]
"!TARGET_INTEGER_DFMODE_MOVES"
"*
{
***************
*** 2323,2329 ****
(define_insn "*pushdf_integer"
[(set (match_operand:DF 0 "push_operand" "=<,<,<")
! (match_operand:DF 1 "general_no_elim_operand" "f#rY,rFo#fY,Y#rf"))]
"TARGET_INTEGER_DFMODE_MOVES"
"*
{
--- 2323,2329 ----
(define_insn "*pushdf_integer"
[(set (match_operand:DF 0 "push_operand" "=<,<,<")
! (match_operand:DF 1 "general_no_elim_operand" "f,rFo,Y"))]
"TARGET_INTEGER_DFMODE_MOVES"
"*
{
***************
*** 2371,2378 ****
;; when optimizing for size.
(define_insn "*movdf_nointeger"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f#Y,m,f#Y,*r,o,Y#f,m")
! (match_operand:DF 1 "general_operand" "fm#Y,f#Y,G,*roF,F*r,Ym#f,Y#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& (optimize_size || !TARGET_INTEGER_DFMODE_MOVES)
&& (reload_in_progress || reload_completed
--- 2371,2378 ----
;; when optimizing for size.
(define_insn "*movdf_nointeger"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,f,*r,o,Y,m")
! (match_operand:DF 1 "general_operand" "fm,f,G,*roF,F*r,Ym,Y"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& (optimize_size || !TARGET_INTEGER_DFMODE_MOVES)
&& (reload_in_progress || reload_completed
***************
*** 2422,2429 ****
(set_attr "mode" "DF,DF,DF,SI,SI,DF,DF")])
(define_insn "*movdf_integer"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f#Yr,m,f#Yr,r#Yf,o,Y#rf,m")
! (match_operand:DF 1 "general_operand" "fm#Yr,f#Yr,G,roF#Yf,Fr#Yf,Ym#rf,Y#rf"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size && TARGET_INTEGER_DFMODE_MOVES
&& (reload_in_progress || reload_completed
--- 2422,2429 ----
(set_attr "mode" "DF,DF,DF,SI,SI,DF,DF")])
(define_insn "*movdf_integer"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,f,r,o,Y,m")
! (match_operand:DF 1 "general_operand" "fm,f,G,roF,Fr,Ym,Y"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size && TARGET_INTEGER_DFMODE_MOVES
&& (reload_in_progress || reload_completed
***************
*** 2597,2603 ****
(define_insn "*pushxf_integer"
[(set (match_operand:XF 0 "push_operand" "=<,<")
! (match_operand:XF 1 "general_no_elim_operand" "f#r,rFo#f"))]
"!optimize_size"
"*
{
--- 2597,2603 ----
(define_insn "*pushxf_integer"
[(set (match_operand:XF 0 "push_operand" "=<,<")
! (match_operand:XF 1 "general_no_elim_operand" "f,rFo"))]
"!optimize_size"
"*
{
***************
*** 2625,2631 ****
(define_insn "*pushtf_integer"
[(set (match_operand:TF 0 "push_operand" "=<,<")
! (match_operand:TF 1 "general_no_elim_operand" "f#r,rFo#f"))]
"!optimize_size"
"*
{
--- 2625,2631 ----
(define_insn "*pushtf_integer"
[(set (match_operand:TF 0 "push_operand" "=<,<")
! (match_operand:TF 1 "general_no_elim_operand" "f,rFo"))]
"!optimize_size"
"*
{
***************
*** 2772,2779 ****
(set_attr "mode" "XF,XF,XF,SI,SI")])
(define_insn "*movxf_integer"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f#r,m,f#r,r#f,o")
! (match_operand:XF 1 "general_operand" "fm#r,f#r,G,roF#f,Fr#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size
&& (reload_in_progress || reload_completed
--- 2772,2779 ----
(set_attr "mode" "XF,XF,XF,SI,SI")])
(define_insn "*movxf_integer"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,f,r,o")
! (match_operand:XF 1 "general_operand" "fm,f,G,roF,Fr"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size
&& (reload_in_progress || reload_completed
***************
*** 2819,2826 ****
(set_attr "mode" "XF,XF,XF,SI,SI")])
(define_insn "*movtf_integer"
! [(set (match_operand:TF 0 "nonimmediate_operand" "=f#r,m,f#r,r#f,o")
! (match_operand:TF 1 "general_operand" "fm#r,f#r,G,roF#f,Fr#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size
&& (reload_in_progress || reload_completed
--- 2819,2826 ----
(set_attr "mode" "XF,XF,XF,SI,SI")])
(define_insn "*movtf_integer"
! [(set (match_operand:TF 0 "nonimmediate_operand" "=f,m,f,r,o")
! (match_operand:TF 1 "general_operand" "fm,f,G,roF,Fr"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size
&& (reload_in_progress || reload_completed
***************
*** 3366,3373 ****
}")
(define_insn "*extendsfdf2_1"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f#Y,mf#Y,Y#f")
! (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm#Y,f#Y,mY#f")))]
"(TARGET_80387 || TARGET_SSE2)
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"*
--- 3366,3373 ----
}")
(define_insn "*extendsfdf2_1"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f,mf,Y")
! (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,f,mY")))]
"(TARGET_80387 || TARGET_SSE2)
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"*
***************
*** 7148,7154 ****
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*negsf2_if"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=f#r,rm#f")
(neg:SF (match_operand:SF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (NEG, SFmode, operands)"
--- 7148,7154 ----
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*negsf2_if"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=f,rm")
(neg:SF (match_operand:SF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (NEG, SFmode, operands)"
***************
*** 7203,7209 ****
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*negdf2_if"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f#r,rm#f")
(neg:DF (match_operand:DF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (NEG, DFmode, operands)"
--- 7203,7209 ----
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*negdf2_if"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f,rm")
(neg:DF (match_operand:DF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (NEG, DFmode, operands)"
***************
*** 7246,7252 ****
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*negxf2_if"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f#r,rm#f")
(neg:XF (match_operand:XF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (NEG, XFmode, operands)"
--- 7246,7252 ----
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*negxf2_if"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f,rm")
(neg:XF (match_operand:XF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (NEG, XFmode, operands)"
***************
*** 7275,7281 ****
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*negtf2_if"
! [(set (match_operand:TF 0 "nonimmediate_operand" "=f#r,rm#f")
(neg:TF (match_operand:TF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (NEG, TFmode, operands)"
--- 7275,7281 ----
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*negtf2_if"
! [(set (match_operand:TF 0 "nonimmediate_operand" "=f,rm")
(neg:TF (match_operand:TF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (NEG, TFmode, operands)"
***************
*** 7402,7408 ****
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*abssf2_if"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=f#r,rm#f")
(abs:SF (match_operand:SF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (ABS, SFmode, operands)"
--- 7402,7408 ----
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*abssf2_if"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=f,rm")
(abs:SF (match_operand:SF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (ABS, SFmode, operands)"
***************
*** 7457,7463 ****
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*absdf2_if"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f#r,rm#f")
(abs:DF (match_operand:DF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (ABS, DFmode, operands)"
--- 7457,7463 ----
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*absdf2_if"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f,rm")
(abs:DF (match_operand:DF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (ABS, DFmode, operands)"
***************
*** 7500,7506 ****
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*absxf2_if"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f#r,rm#f")
(abs:XF (match_operand:XF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (ABS, XFmode, operands)"
--- 7500,7506 ----
;; because of secondary memory needed to reload from class FLOAT_INT_REGS
;; to itself.
(define_insn "*absxf2_if"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f,rm")
(abs:XF (match_operand:XF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (ABS, XFmode, operands)"
***************
*** 7526,7532 ****
operands[0] = gen_rtx_REG (SImode, true_regnum (operands[0]) + 2);")
(define_insn "*abstf2_if"
! [(set (match_operand:TF 0 "nonimmediate_operand" "=f#r,rm#f")
(abs:TF (match_operand:TF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (ABS, TFmode, operands)"
--- 7526,7532 ----
operands[0] = gen_rtx_REG (SImode, true_regnum (operands[0]) + 2);")
(define_insn "*abstf2_if"
! [(set (match_operand:TF 0 "nonimmediate_operand" "=f,rm")
(abs:TF (match_operand:TF 1 "nonimmediate_operand" "0,0")))
(clobber (reg:CC 17))]
"TARGET_80387 && ix86_unary_operator_ok (ABS, TFmode, operands)"
***************
*** 9522,9529 ****
(define_insn "*fp_jcc_1_sse"
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
! [(match_operand 1 "register_operand" "f#x,x#f")
! (match_operand 2 "nonimmediate_operand" "f#x,xm#f")])
(label_ref (match_operand 3 "" ""))
(pc)))
(clobber (reg:CCFP 18))
--- 9522,9529 ----
(define_insn "*fp_jcc_1_sse"
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
! [(match_operand 1 "register_operand" "f,x")
! (match_operand 2 "nonimmediate_operand" "f,xm")])
(label_ref (match_operand 3 "" ""))
(pc)))
(clobber (reg:CCFP 18))
***************
*** 9564,9571 ****
(define_insn "*fp_jcc_2_sse"
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
! [(match_operand 1 "register_operand" "f#x,x#f")
! (match_operand 2 "nonimmediate_operand" "f#x,xm#f")])
(pc)
(label_ref (match_operand 3 "" ""))))
(clobber (reg:CCFP 18))
--- 9564,9571 ----
(define_insn "*fp_jcc_2_sse"
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
! [(match_operand 1 "register_operand" "f,x")
! (match_operand 2 "nonimmediate_operand" "f,xm")])
(pc)
(label_ref (match_operand 3 "" ""))))
(clobber (reg:CCFP 18))
***************
*** 10340,10349 ****
;; Gcc is slightly more smart about handling normal two address instructions
;; so use special patterns for add and mull.
(define_insn "*fop_sf_comm"
! [(set (match_operand:SF 0 "register_operand" "=f#x,x#f")
(match_operator:SF 3 "binary_fp_operator"
[(match_operand:SF 1 "register_operand" "%0,0")
! (match_operand:SF 2 "nonimmediate_operand" "fm#x,xm#f")]))]
"TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
"* return output_387_binary_op (insn, operands);"
--- 10340,10349 ----
;; Gcc is slightly more smart about handling normal two address instructions
;; so use special patterns for add and mull.
(define_insn "*fop_sf_comm"
! [(set (match_operand:SF 0 "register_operand" "=f,x")
(match_operator:SF 3 "binary_fp_operator"
[(match_operand:SF 1 "register_operand" "%0,0")
! (match_operand:SF 2 "nonimmediate_operand" "fm,xm")]))]
"TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
"* return output_387_binary_op (insn, operands);"
***************
*** 10366,10375 ****
(set_attr "mode" "SF")])
(define_insn "*fop_df_comm"
! [(set (match_operand:DF 0 "register_operand" "=f#Y,Y#f")
(match_operator:DF 3 "binary_fp_operator"
[(match_operand:DF 1 "register_operand" "%0,0")
! (match_operand:DF 2 "nonimmediate_operand" "fm#Y,Ym#f")]))]
"TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
"* return output_387_binary_op (insn, operands);"
--- 10366,10375 ----
(set_attr "mode" "SF")])
(define_insn "*fop_df_comm"
! [(set (match_operand:DF 0 "register_operand" "=f,Y")
(match_operator:DF 3 "binary_fp_operator"
[(match_operand:DF 1 "register_operand" "%0,0")
! (match_operand:DF 2 "nonimmediate_operand" "fm,Ym")]))]
"TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
"* return output_387_binary_op (insn, operands);"
***************
*** 10422,10428 ****
[(set (match_operand:SF 0 "register_operand" "=f,f,x")
(match_operator:SF 3 "binary_fp_operator"
[(match_operand:SF 1 "nonimmediate_operand" "0,fm,0")
! (match_operand:SF 2 "nonimmediate_operand" "fm,0,xm#f")]))]
"TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
--- 10422,10428 ----
[(set (match_operand:SF 0 "register_operand" "=f,f,x")
(match_operator:SF 3 "binary_fp_operator"
[(match_operand:SF 1 "nonimmediate_operand" "0,fm,0")
! (match_operand:SF 2 "nonimmediate_operand" "fm,0,xm")]))]
"TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
***************
*** 10487,10496 ****
(set_attr "mode" "SI")])
(define_insn "*fop_df_1"
! [(set (match_operand:DF 0 "register_operand" "=f#Y,f#Y,Y#f")
(match_operator:DF 3 "binary_fp_operator"
[(match_operand:DF 1 "nonimmediate_operand" "0,fm,0")
! (match_operand:DF 2 "nonimmediate_operand" "fm,0,Ym#f")]))]
"TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
--- 10487,10496 ----
(set_attr "mode" "SI")])
(define_insn "*fop_df_1"
! [(set (match_operand:DF 0 "register_operand" "=f,f,Y")
(match_operator:DF 3 "binary_fp_operator"
[(match_operand:DF 1 "nonimmediate_operand" "0,fm,0")
! (match_operand:DF 2 "nonimmediate_operand" "fm,0,Ym")]))]
"TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
***************
*** 10880,10887 ****
}")
(define_insn "sqrtsf2_1"
! [(set (match_operand:SF 0 "register_operand" "=f#x,x#f")
! (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0#x,xm#f")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_SSE && TARGET_MIX_SSE_I387)"
"@
--- 10880,10887 ----
}")
(define_insn "sqrtsf2_1"
! [(set (match_operand:SF 0 "register_operand" "=f,x")
! (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0,xm")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_SSE && TARGET_MIX_SSE_I387)"
"@
***************
*** 10921,10928 ****
}")
(define_insn "sqrtdf2_1"
! [(set (match_operand:DF 0 "register_operand" "=f#Y,Y#f")
! (sqrt:DF (match_operand:DF 1 "nonimmediate_operand" "0#Y,Ym#f")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_SSE2 && TARGET_MIX_SSE_I387)"
"@
--- 10921,10928 ----
}")
(define_insn "sqrtdf2_1"
! [(set (match_operand:DF 0 "register_operand" "=f,Y")
! (sqrt:DF (match_operand:DF 1 "nonimmediate_operand" "0,Ym")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_SSE2 && TARGET_MIX_SSE_I387)"
"@
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