unordered comparisons for mips

[Eric Christopher]

Here's a patch that adds some basic unordered comparison patterns for
mips. It adds enough to fix fp-cmp-4.c on mips64-elf and mips-elf.

I'll commit tomorrow unless someone has an objection :)

-eric

-- 
Look out behind you!

2001-08-27  Eric Christopher  <echristo@redhat.com>

	* config/mips/mips.md (bunordered): New pattern.
	(sunordered): Ditto.
	(sunordered_df): Ditto.
	(sunordered_sf): Ditto.

Index: gcc/gcc/config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.107
diff -u -p -w -r1.107 mips.md
--- mips.md	2001/08/19 21:40:37	1.107
+++ mips.md	2001/08/24 04:05:35
@@ -7867,6 +7867,22 @@ move\\t%0,%z4\\n\\
    (set_attr "mode"	"none")
    (set_attr "length"	"8")])
 
+(define_expand "bunordered"
+  [(set (pc)
+	(if_then_else (unordered:CC (cc0)
+				    (const_int 0))
+		      (label_ref (match_operand 0 "" ""))
+		      (pc)))]
+  ""
+  "
+{
+  if (operands[0])		/* avoid unused code warning */
+    {
+      gen_conditional_branch (operands, UNORDERED);
+      DONE;
+    }
+}")
+
 (define_expand "beq"
   [(set (pc)
 	(if_then_else (eq:CC (cc0)
@@ -8036,6 +8052,32 @@ move\\t%0,%z4\\n\\
 ;;
 ;;  ....................
 
+(define_expand "sunordered"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+	(unordered:SI (match_dup 1)
+		      (match_dup 2)))]
+  ""
+  "
+{
+ if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
+    FAIL;
+
+  /* set up operands from compare.  */
+  operands[1] = branch_cmp[0];
+  operands[2] = branch_cmp[1];
+
+  if (TARGET_64BIT || !TARGET_DEBUG_C_MODE || TARGET_MIPS16)
+    {
+      gen_int_relational (UNORDERED, operands[0], operands[1], operands[2], (int *)0);
+      DONE;
+    }
+
+  if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0)
+    operands[2] = force_reg (SImode, operands[2]);
+
+  /* fall through and generate default code */
+}")
+
 (define_expand "seq"
   [(set (match_operand:SI 0 "register_operand" "=d")
 	(eq:SI (match_dup 1)
@@ -8923,6 +8965,18 @@ move\\t%0,%z4\\n\\
 ;;
 ;;  ....................
 
+(define_insn "sunordered_df"
+  [(set (match_operand:CC 0 "register_operand" "=z")
+	(unordered:CC (match_operand:DF 1 "register_operand" "f")
+		      (match_operand:DF 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
+  "*
+{
+ return mips_fill_delay_slot (\"c.un.d\\t%Z0%1,%2\", DELAY_FCMP, operands, insn);
+}"
+ [(set_attr "type"      "fcmp")
+  (set_attr "mode"      "FPSW")])
+
 (define_insn "seq_df"
   [(set (match_operand:CC 0 "register_operand" "=z")
 	(eq:CC (match_operand:DF 1 "register_operand" "f")
@@ -8979,6 +9033,18 @@ move\\t%0,%z4\\n\\
   "*
 {
   return mips_fill_delay_slot (\"c.le.d\\t%Z0%2,%1\", DELAY_FCMP, operands, insn);
+}"
+ [(set_attr "type"	"fcmp")
+  (set_attr "mode"	"FPSW")])
+
+(define_insn "sunordered_sf"
+  [(set (match_operand:CC 0 "register_operand" "=z")
+	(unordered:CC (match_operand:SF 1 "register_operand" "f")
+		      (match_operand:SF 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT"
+  "*
+{
+ return mips_fill_delay_slot (\"c.un.s\\t%Z0%1,%2\", DELAY_FCMP, operands, insn);
 }"
  [(set_attr "type"	"fcmp")
   (set_attr "mode"	"FPSW")])