SSE2 and integer moves
Jan Hubicka
jh@suse.cz
Fri Apr 27 04:39:00 GMT 2001
Hi
This patch fixes/updates the move patterns to handle SI and DImode moves in SSE
registers. It would be nice to add SSE support to the integer arithmetic too,
but this brings reload problems when it tries to eliminate virtual register,
so I will try to do that separately.
This part is required for x86_64 calling conventions, that handles SSE registers
as integers in some cases of passing structures.
Honza
Fri Apr 27 13:36:17 CEST 2001 Jan Hubicka <jh@suse.cz>
* i386.h (VALID_SSE_REG_MODE): Accept MMX modes if SSE2
* i386.md (movsi_1, movdi2, movdi_1_rex64): Handle SSE2 moves.
Index: gcc/config/i386/i386.h
===================================================================
RCS file: /home/cvs/Repository/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.43
diff -c -3 -p -r1.43 i386.h
*** gcc/config/i386/i386.h 2001/04/26 17:37:06 1.43
--- gcc/config/i386/i386.h 2001/04/27 10:22:18
*************** extern int ix86_arch;
*** 907,913 ****
#define VALID_SSE_REG_MODE(MODE) \
((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
! || (MODE) == SFmode || (TARGET_SSE2 && (MODE) == DFmode))
#define VALID_MMX_REG_MODE(MODE) \
((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \
--- 907,914 ----
#define VALID_SSE_REG_MODE(MODE) \
((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
! || (MODE) == SFmode \
! || (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE))))
#define VALID_MMX_REG_MODE(MODE) \
((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \
Index: gcc/config/i386/i386.md
===================================================================
RCS file: /home/cvs/Repository/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.59
diff -c -3 -p -r1.59 i386.md
*** gcc/config/i386/i386.md 2001/04/26 17:51:36 1.59
--- gcc/config/i386/i386.md 2001/04/27 10:22:23
***************
*** 1735,1747 ****
(set_attr "length_immediate" "1")])
(define_insn "*movsi_1"
! [(set (match_operand:SI 0 "nonimmediate_operand" "=*a,r,*a,m,!*y,!r")
! (match_operand:SI 1 "general_operand" "im,rinm,rinm,rin,r,*y"))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
"*
{
switch (get_attr_type (insn))
{
case TYPE_MMX:
return \"movd\\t{%1, %0|%0, %1}\";
--- 1735,1752 ----
(set_attr "length_immediate" "1")])
(define_insn "*movsi_1"
! [(set (match_operand:SI 0 "nonimmediate_operand" "=*a,r,*a,m,!*y,!rm,!*Y,!rm,!*Y")
! (match_operand:SI 1 "general_operand" "im,rinm,rinm,rin,rm,*y,rm,*Y,*Y"))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
"*
{
switch (get_attr_type (insn))
{
+ case TYPE_SSE:
+ if (get_attr_mode (insn) == TImode)
+ return \"movdqa\\t{%1, %0|%0, %1}\";
+ return \"movd\\t{%1, %0|%0, %1}\";
+
case TYPE_MMX:
return \"movd\\t{%1, %0|%0, %1}\";
***************
*** 1755,1770 ****
}
}"
[(set (attr "type")
! (cond [(ior (match_operand:SI 0 "mmx_reg_operand" "")
! (match_operand:SI 1 "mmx_reg_operand" ""))
(const_string "mmx")
(and (ne (symbol_ref "flag_pic") (const_int 0))
(match_operand:SI 1 "symbolic_operand" ""))
(const_string "lea")
]
(const_string "imov")))
! (set_attr "modrm" "0,*,0,*,*,*")
! (set_attr "mode" "SI")])
;; Stores and loads of ax to arbitary constant address.
;; We fake an second form of instruction to force reload to load address
--- 1760,1776 ----
}
}"
[(set (attr "type")
! (cond [(eq_attr "alternative" "4,5")
(const_string "mmx")
+ (eq_attr "alternative" "6,7,8")
+ (const_string "sse")
(and (ne (symbol_ref "flag_pic") (const_int 0))
(match_operand:SI 1 "symbolic_operand" ""))
(const_string "lea")
]
(const_string "imov")))
! (set_attr "modrm" "0,*,0,*,*,*,*,*,*")
! (set_attr "mode" "SI,SI,SI,SI,SI,SI,TI,SI,SI")])
;; Stores and loads of ax to arbitary constant address.
;; We fake an second form of instruction to force reload to load address
***************
*** 2465,2480 ****
(set_attr "length_immediate" "1")])
(define_insn "*movdi_2"
! [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,!m*y,!*y")
! (match_operand:DI 1 "general_operand" "riFo,riF,*y,m"))]
"!TARGET_64BIT
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"@
#
#
movq\\t{%1, %0|%0, %1}
movq\\t{%1, %0|%0, %1}"
! [(set_attr "type" "*,*,mmx,mmx")])
(define_split
[(set (match_operand:DI 0 "push_operand" "")
--- 2471,2490 ----
(set_attr "length_immediate" "1")])
(define_insn "*movdi_2"
! [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,!m*y,!*y,!m,*Y,!*Y")
! (match_operand:DI 1 "general_operand" "riFo,riF,*y,m,*Y,*Y,m"))]
"!TARGET_64BIT
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"@
#
#
movq\\t{%1, %0|%0, %1}
+ movq\\t{%1, %0|%0, %1}
+ movq\\t{%1, %0|%0, %1}
+ movdqa\\t{%1, %0|%0, %1}
movq\\t{%1, %0|%0, %1}"
! [(set_attr "type" "*,*,mmx,mmx,sse,sse,sse")
! (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI")])
(define_split
[(set (match_operand:DI 0 "push_operand" "")
***************
*** 2493,2500 ****
"ix86_split_long_move (operands); DONE;")
(define_insn "*movdi_1_rex64"
! [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,mr,!mr,!m*y,!*y,m*Y,*Y")
! (match_operand:DI 1 "general_operand" "Z,rem,i,re,n,*y,m,*Y,*m"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& TARGET_64BIT"
"*
--- 2503,2510 ----
"ix86_split_long_move (operands); DONE;")
(define_insn "*movdi_1_rex64"
! [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,mr,!mr,!m*y,!*y,!*Y,!m,!*Y")
! (match_operand:DI 1 "general_operand" "Z,rem,i,re,n,*y,m,*Y,*Y,*m"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& TARGET_64BIT"
"*
***************
*** 2502,2509 ****
switch (get_attr_type (insn))
{
case TYPE_SSE:
case TYPE_MMX:
! return \"movd\\t{%1, %0|%0, %1}\";
case TYPE_MULTI:
return \"#\";
case TYPE_LEA:
--- 2512,2523 ----
switch (get_attr_type (insn))
{
case TYPE_SSE:
+ if (register_operand (operands[0], DImode)
+ && register_operand (operands[1], DImode))
+ return \"movdqa\\t{%1, %0|%0, %1}\";
+ /* FALLTHRU */
case TYPE_MMX:
! return \"movq\\t{%1, %0|%0, %1}\";
case TYPE_MULTI:
return \"#\";
case TYPE_LEA:
***************
*** 2531,2539 ****
(const_string "lea")
]
(const_string "imov")))
! (set_attr "modrm" "*,0,0,*,*,*,*,*,*")
! (set_attr "length_immediate" "*,4,8,*,*,*,*,*,*")
! (set_attr "mode" "SI,DI,DI,DI,SI,DI,DI,DI,DI")])
;; Stores and loads of ax to arbitary constant address.
;; We fake an second form of instruction to force reload to load address
--- 2545,2553 ----
(const_string "lea")
]
(const_string "imov")))
! (set_attr "modrm" "*,0,0,*,*,*,*,*,*,*")
! (set_attr "length_immediate" "*,4,8,*,*,*,*,*,*,*")
! (set_attr "mode" "SI,DI,DI,DI,SI,DI,DI,DI,TI,DI")])
;; Stores and loads of ax to arbitary constant address.
;; We fake an second form of instruction to force reload to load address
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