Patch for md.texi: Fix i386 constraints

Andreas Jaeger aj@suse.de
Fri Apr 27 00:21:00 GMT 2001


Richard Henderson <rth@redhat.com> writes:

> On Sun, Apr 22, 2001 at 02:04:17PM +0200, Andreas Jaeger wrote:
> > > GCC may use any register pair to hold 64bit values on 32bit system
> [...]
> > Are you sure?  In glibc we often do:
> > __asm__ __volatile__ ("rdtsc" : "=A" (Var))
> > and rdtsc puts the value in ax:dx.  The current description is misleading.
> 
> Yes, but your replacement is just as misleading.
> 
> > -@samp{a}, or @code{d} register (for 64-bit ints)
> > +@samp{a} and @samp{d} register used together to store 64-bit ints.  The
> > +@samp{a} register will store the most significand 32-bits, the @samp{d}
> > +register the least significand 32-bits.
> 
> How about
> 
>   Specifies the @samp{a} or @samp{d} registers.  This is primarily useful
>   for 64-bit integer values (when in 32-bit mode) intended to be returned
>   with @code{EDX} holding the most significant bits and @code{EAX} holding
>   the least significant bits.

I'm now convinced this is best.  Ok to commit the slightly revised
version?

Andreas

2001-04-22  Andreas Jaeger  <aj@suse.de>
	    Richard Henderson  <rth@redhat.com>

	* md.texi (Machine Constraints): Document additional i386
	constraints and fix description of "A".


============================================================
Index: gcc/md.texi
--- gcc/md.texi	2001/03/28 11:03:55	1.59
+++ gcc/md.texi	2001/04/27 07:19:19
@@ -1539,7 +1539,7 @@
 @table @code
 @item q
 @samp{a}, @code{b}, @code{c}, or @code{d} register for the i386.
-For x86-64 it is equivalent to @samp{r} class. (for 8bit instrucitons that
+For x86-64 it is equivalent to @samp{r} class. (for 8bit instructions that
 do not use upper halves)
 
 @item Q
@@ -1552,7 +1552,10 @@
 instruction)
 
 @item A
-@samp{a}, or @code{d} register (for 64-bit ints)
+Specifies the @samp{a} or @samp{d} registers.  This is primarily useful
+for 64-bit integer values (when in 32-bit mode) intended to be returned
+with the @samp{d} register holding the most significant bits and the
+@samp{a} register holding the least significant bits.
 
 @item f
 Floating point register
@@ -1580,6 +1583,12 @@
 
 @item S
 @samp{si} register
+
+@item x
+@samp{xmm} SSE register
+
+@item y
+MMX register
 
 @item I
 Constant in range 0 to 31 (for 32 bit shifts)


-- 
 Andreas Jaeger
  SuSE Labs aj@suse.de
   private aj@arthur.inka.de
    http://www.suse.de/~aj



More information about the Gcc-patches mailing list