Patch installed in combine.c

[Jan Hubicka]

> Not at all, I suppose.  Hmmm... your code had an explicit check whether the
> insn is a simple move, while my version doesn't test for that.
I see.
> 
> > > Looking around in some machine descriptions it seems like the sparc, and
> > > possibly others, can also suffer from the same problem.  While we probably
> > > should mark the cc registers fixed in such cases, I'll probably turn off
> > > the new checks in combine for non-SMALL_REGISTER_CLASSES machines.
> > On non-SRC machines I've got some improvements with the patch, because
> > of better register preferencing.  The hard_reg->reg moves are recognized
> > by global.c and thread specially.
> 
> In that case, it's probably better just to add the necessary tests only to
> avoid hardreg<->pseudo moves and no other insns involving hard regs (and
> hope that it's safe to do so; I'm a bit paranoid about allowing too many
> hard register combinations...)
Me too, but diallowing them we lose many optimizations.  Assuming that on
SRC machines, all allocatable hard regs should appear only in the moves
(this holds for current i386), we will get sane results by checking
for moves explicitly.

I am not quite sure tought if loop optimizer may not turn hard reg based
moves to arithmetics or so, but it should not on SRC IMO.

Honza
> 
> 
> Bernd