misc ia64 patches
Richard Henderson
rth@cygnus.com
Tue Nov 7 18:02:00 GMT 2000
I remember finding a test case that required the extra movbi alternative
before I went on a short vacation this last weekend, but I've misplaced
it in the meantime. Similarly with the cmovdi changes.
Current ia64 binutils does sort the .IA_64.unwind section, which makes
the optimization in find_fde_for_dso work.
r~
* config/ia64/fde-glibc.c (find_fde_for_dso): Do a binary
search on the unwind region section.
* config/ia64/ia64.md (movbi): Add r/r alternative.
(cmovdi_internal_astep): Describe all combinations of register
classes for sources & destinations; remove matching constraints.
(cmovdi_internal): Likewise.
Index: fde-glibc.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/ia64/fde-glibc.c,v
retrieving revision 1.1
diff -c -p -d -r1.1 fde-glibc.c
*** fde-glibc.c 2000/10/04 03:08:49 1.1
--- fde-glibc.c 2000/11/08 01:54:25
*************** find_fde_for_dso (Elf64_Addr pc, Elf64_E
*** 54,60 ****
Elf64_Phdr *phdr, *p_unwind;
long n, match;
Elf64_Addr load_base, seg_base;
! fde *f;
/* Verify that we are looking at an ELF header. */
if (ehdr->e_ident[0] != 0x7f
--- 54,61 ----
Elf64_Phdr *phdr, *p_unwind;
long n, match;
Elf64_Addr load_base, seg_base;
! fde *f_base;
! size_t lo, hi;
/* Verify that we are looking at an ELF header. */
if (ehdr->e_ident[0] != 0x7f
*************** find_fde_for_dso (Elf64_Addr pc, Elf64_E
*** 88,101 ****
return NULL;
/* Search for the FDE within the unwind segment. */
- /* ??? Ideally ld would have sorted this for us by address. Until
- that's fixed, we must do a linear search. */
! f = (fde *) (p_unwind->p_vaddr + load_base);
seg_base = (Elf64_Addr) ehdr;
! for (n = p_unwind->p_memsz / sizeof (fde); --n >= 0; ++f)
! if (pc >= f->start_offset + seg_base && pc < f->end_offset + seg_base)
! return f;
return NULL;
}
--- 89,112 ----
return NULL;
/* Search for the FDE within the unwind segment. */
! f_base = (fde *) (p_unwind->p_vaddr + load_base);
seg_base = (Elf64_Addr) ehdr;
! lo = 0;
! hi = p_unwind->p_memsz / sizeof (fde);
!
! while (lo < hi)
! {
! size_t mid = (lo + hi) / 2;
! fde *f = f_base + mid;
!
! if (pc < f->start_offset + seg_base)
! hi = mid;
! else if (pc >= f->end_offset + seg_base)
! lo = mid + 1;
! else
! return f;
! }
return NULL;
}
Index: ia64.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/ia64/ia64.md,v
retrieving revision 1.52
diff -c -p -d -r1.52 ia64.md
*** ia64.md 2000/10/23 23:38:39 1.52
--- ia64.md 2000/11/08 01:54:25
***************
*** 175,182 ****
(set_attr "predicable" "no")])
(define_insn "movbi"
! [(set (match_operand:BI 0 "nonimmediate_operand" "=c,c,?c,?*r, c,*r,*r,*m")
! (match_operand:BI 1 "move_operand" " O,n, c, c,*r, n,*m,*r"))]
""
"@
cmp.ne %0, %I0 = r0, r0
--- 175,182 ----
(set_attr "predicable" "no")])
(define_insn "movbi"
! [(set (match_operand:BI 0 "nonimmediate_operand" "=c,c,?c,?*r, c,*r,*r,*m,*r")
! (match_operand:BI 1 "move_operand" " O,n, c, c,*r, n,*m,*r,*r"))]
""
"@
cmp.ne %0, %I0 = r0, r0
***************
*** 186,193 ****
tbit.nz %0, %I0 = %1, 0
adds %0 = %1, r0
ld1%O1 %0 = %1%P1
! st1%Q0 %0 = %1%P0"
! [(set_attr "type" "A,A,unknown,unknown,I,A,M,M")])
(define_split
[(set (match_operand:BI 0 "register_operand" "")
--- 186,194 ----
tbit.nz %0, %I0 = %1, 0
adds %0 = %1, r0
ld1%O1 %0 = %1%P1
! st1%Q0 %0 = %1%P0
! mov %0 = %1"
! [(set_attr "type" "A,A,unknown,unknown,I,A,M,M,A")])
(define_split
[(set (match_operand:BI 0 "register_operand" "")
***************
*** 4556,4571 ****
;; Errata 72 workaround.
(define_insn "*cmovdi_internal_astep"
[(set (match_operand:DI 0 "register_operand"
! "=r,*f,*b,r,*f,*b,r,*f,*b")
(if_then_else:DI
(match_operator 4 "predicate_operator"
[(match_operand:BI 1 "register_operand"
! "c,c,c,c,c,c,c,c,c")
(const_int 0)])
(match_operand:DI 2 "move_operand"
! "0,0,0,ri*f*b,rO,r,ri*f*b,rO,r")
(match_operand:DI 3 "move_operand"
! "ri*f*b,rO,r,0,0,0,ri*f*b,rO,r")))]
"TARGET_A_STEP
&& ia64_move_ok (operands[0], operands[2])
&& ia64_move_ok (operands[0], operands[3])"
--- 4557,4572 ----
;; Errata 72 workaround.
(define_insn "*cmovdi_internal_astep"
[(set (match_operand:DI 0 "register_operand"
! "=r, r, r, r, r, r, r, r, r, r,*f,*b,*d*e")
(if_then_else:DI
(match_operator 4 "predicate_operator"
[(match_operand:BI 1 "register_operand"
! " c, c, c, c, c, c, c, c, c, c, c, c, c")
(const_int 0)])
(match_operand:DI 2 "move_operand"
! "ri,*f,*b,*d*e,ri,ri, ri,*f,*b,*d*e,rO,rO, rK")
(match_operand:DI 3 "move_operand"
! "ri,ri,ri, ri,*f,*b,*d*e,*f,*b,*d*e,rO,rO, rK")))]
"TARGET_A_STEP
&& ia64_move_ok (operands[0], operands[2])
&& ia64_move_ok (operands[0], operands[3])"
***************
*** 4574,4589 ****
(define_insn "*cmovdi_internal"
[(set (match_operand:DI 0 "destination_operand"
! "=r,m,*f,Q,*b,*d*e,r,m,*f,Q,*b,*d*e,r,m,*f,Q,*b,*d*e")
(if_then_else:DI
(match_operator 4 "predicate_operator"
[(match_operand:BI 1 "register_operand"
! "c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c")
(const_int 0)])
(match_operand:DI 2 "move_operand"
! "0,0,0,0,0,0,rim*f*b*d*e,rO,rOQ,*f,rO,rK,rim*f*b*d*e,rO,rOQ,*f,rO,rK")
(match_operand:DI 3 "move_operand"
! "rim*f*b*d*e,rO,rOQ,*f,rO,rK,0,0,0,0,0,0,rim*f*b*d*e,rO,rOQ,*f,rO,rK")))]
"! TARGET_A_STEP
&& ia64_move_ok (operands[0], operands[2])
&& ia64_move_ok (operands[0], operands[3])"
--- 4575,4590 ----
(define_insn "*cmovdi_internal"
[(set (match_operand:DI 0 "destination_operand"
! "= r, r, r, r, r, r, r, r, r, r, m, Q, *f,*b,*d*e")
(if_then_else:DI
(match_operator 4 "predicate_operator"
[(match_operand:BI 1 "register_operand"
! "c,c,c,c,c,c,c,c,c,c,c,c,c,c,c")
(const_int 0)])
(match_operand:DI 2 "move_operand"
! "rim, *f, *b,*d*e,rim,rim, rim,*f,*b,*d*e,rO,*f,rOQ,rO, rK")
(match_operand:DI 3 "move_operand"
! "rim,rim,rim, rim, *f, *b,*d*e,*f,*b,*d*e,rO,*f,rOQ,rO, rK")))]
"! TARGET_A_STEP
&& ia64_move_ok (operands[0], operands[2])
&& ia64_move_ok (operands[0], operands[3])"
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