avr port: patch for .texi files

Denis Chertykov denisc@overta.ru
Wed Feb 16 03:41:00 GMT 2000


Wed Feb 16 14:24:41 2000  Denis Chertykov  <denisc@overta.ru>

	* gcc/invoke.texi: Add AVR invocation docs.
	* gcc/install.texi: Add information about AVR.
	* gcc/md.texi: Add AVR constraint letters description.
	* gcc/extend.texi: Add description for AVR specific attributes.

Index: egcs/gcc/invoke.texi
===================================================================
RCS file: /cvs/gcc/egcs/gcc/invoke.texi,v
retrieving revision 1.168
diff -c -3 -p -r1.168 invoke.texi
*** invoke.texi	2000/02/11 09:53:36	1.168
--- invoke.texi	2000/02/16 10:44:17
*************** in the following sections.
*** 427,432 ****
--- 427,436 ----
  -m32032 -m32332 -m32532 -m32081 -m32381 -mmult-add -mnomult-add
  -msoft-float -mrtd -mnortd -mregparam -mnoregparam -msb -mnosb
  -mbitfield -mnobitfield -mhimem -mnohimem
+  
+ @emph{AVR Options}
+ -mmcu=@var{mcu} -msize -minit-stack=@var{n} -mno-interrupts
+ -mcall-prologues
  @end smallexample
  
  @item Code Generation Options
*************** that macro, which enables you to change 
*** 3759,3764 ****
--- 3763,3769 ----
  * V850 Options::
  * ARC Options::
  * NS32K Options::
+ * AVR Options::
  @end menu
  
  @node M680x0 Options
*************** Put functions, data, and readonly data i
*** 6717,6722 ****
--- 6722,6753 ----
  by default.  This can be overridden with the @code{section} attribute.
  @xref{Variable Attributes}.
  
+ @end table
+ 
+ @node AVR Options
+ @subsection AVR Options
+ @cindex AVR Options
+ 
+ These options are defined for AVR implementations:
+ 
+ @table @code
+ @item -mmcu=@var{mcu}
+ Specify ATMEL AVR mcu (at90s23xx,attiny22,at90s44xx,at90s85xx,atmega603,
+ atmega103).
+ 
+ @item -msize
+ Output instruction size's to the asm file
+ 
+ @item -minit-stack=@var{N}
+ Specify the initial stack address
+ 
+ @item -mno-interrupts
+ Generated code is not compatible with hardware interrupts.
+ Code size will be smaller.
+ 
+ @item -mcall-prologues
+ Functions prologues/epilogues expanded as call to appropriate
+ subroutines. Code size will be smaller.
  @end table
  
  @node NS32K Options
Index: egcs/gcc/install.texi
===================================================================
RCS file: /cvs/gcc/egcs/gcc/install.texi,v
retrieving revision 1.32
diff -c -3 -p -r1.32 install.texi
*** install.texi	2000/02/14 22:56:20	1.32
--- install.texi	2000/02/16 11:20:31
***************
*** 1,4 ****
! @c Copyright (C) 1988, 89, 92-98, 1999 Free Software Foundation, Inc.
  @c This is part of the GCC manual.
  @c For copying conditions, see the file gcc.texi.
  
--- 1,4 ----
! @c Copyright (C) 1988, 89, 92-99, 2000 Free Software Foundation, Inc.
  @c This is part of the GCC manual.
  @c For copying conditions, see the file gcc.texi.
  
*************** Here are the possible CPU types:
*** 745,751 ****
  
  @quotation
  @c gmicro, fx80, spur and tahoe omitted since they don't work.
! 1750a, a29k, alpha, arm, c@var{n}, clipper, dsp16xx, elxsi, fr30, h8300,
  hppa1.0, hppa1.1, i370, i386, i486, i586, i686, i786, i860, i960, m32r,
  m68000, m68k, m88k, mcore, mips, mipsel, mips64, mips64el, mn10200, mn10300,
  ns32k, pdp11, powerpc, powerpcle, romp, rs6000, sh, sparc, sparclite,
--- 745,751 ----
  
  @quotation
  @c gmicro, fx80, spur and tahoe omitted since they don't work.
! 1750a, a29k, alpha, arm, avr, c@var{n}, clipper, dsp16xx, elxsi, fr30, h8300,
  hppa1.0, hppa1.1, i370, i386, i486, i586, i686, i786, i860, i960, m32r,
  m68000, m68k, m88k, mcore, mips, mipsel, mips64, mips64el, mn10200, mn10300,
  ns32k, pdp11, powerpc, powerpcle, romp, rs6000, sh, sparc, sparclite,
*************** particular configuration.
*** 976,981 ****
--- 976,992 ----
  
  @item a29k-*-bsd
  AMD Am29050 used in a system running a variant of BSD Unix.
+ 
+ @item avr
+ ATMEL AVR-family micro controllers.  These are used in embedded
+ applications.  There are no standard Unix configurations.
+ Supports following MCU's:
+  - AT90S23xx
+  - ATtiny22
+  - AT90S44xx
+  - AT90S85xx
+  - ATmega603/603L
+  - ATmega103/103L
  
  @item decstation-*
  MIPS-based DECstations can support three different personalities:
Index: egcs/gcc/md.texi
===================================================================
RCS file: /cvs/gcc/egcs/gcc/md.texi,v
retrieving revision 1.38
diff -c -3 -p -r1.38 md.texi
*** md.texi	2000/02/14 10:37:12	1.38
--- md.texi	2000/02/16 11:23:19
*************** A floating point constant (in @code{asm}
*** 1330,1335 ****
--- 1330,1395 ----
  independent @samp{E} or @samp{F} instead)
  @end table
  
+ @item AVR family---@file{avr.h}
+ @table @code
+ @item l
+ Registers from r0 to r15
+ 
+ @item a
+ Registers from r16 to r23
+ 
+ @item d
+ Registers from r16 to r31
+ 
+ @item w
+ Register from r24 to r31. This registers can be used in @samp{addw} command
+ 
+ @item e
+ Pointer register (r26 - r31)
+ 
+ @item b
+ Base pointer register (r28 - r31)
+ 
+ @item t
+ Temporary register r0
+ 
+ @item x
+ Register pair X (r27:r26)
+ 
+ @item y
+ Register pair Y (r29:r28)
+ 
+ @item z
+ Register pair Z (r31:r30)
+ 
+ @item I
+ Constant greater than -1, less than 64
+ 
+ @item J
+ Constant greater than -64, less than 1
+ 
+ @item K
+ Constant integer 2
+ 
+ @item L
+ Constant integer 0
+ 
+ @item M
+ Constant that fits in 8 bits
+ 
+ @item N
+ Constant integer -1
+ 
+ @item O
+ Constant integer 8
+ 
+ @item P
+ Constant integer 1
+ 
+ @item G
+ A floating point constant 0.0
+ @end table
+ 
  @item IBM RS6000---@file{rs6000.h}
  @table @code
  @item b
Index: egcs/gcc/extend.texi
===================================================================
RCS file: /cvs/gcc/egcs/gcc/extend.texi,v
retrieving revision 1.41
diff -c -3 -p -r1.41 extend.texi
*** extend.texi	1999/11/28 20:45:34	1.41
--- extend.texi	2000/02/16 11:28:00
*************** function is an interrupt handler.  The c
*** 1682,1687 ****
--- 1682,1706 ----
  entry and exit sequences suitable for use in an interrupt handler when this
  attribute is present.
  
+ Interrupt handler functions on the AVR processors
+ Use this option on the AVR to indicate that the specified
+ function is an interrupt handler.  The compiler will generate function
+ entry and exit sequences suitable for use in an interrupt handler when this
+ attribute is present. Interrupts will be enabled inside function.
+ 
+ @item signal
+ @cindex signal handler functions on the AVR processors
+ Use this option on the AVR to indicate that the specified
+ function is an signal handler.  The compiler will generate function
+ entry and exit sequences suitable for use in an signal handler when this
+ attribute is present. Interrupts will be disabled inside function.
+ 
+ @item naked
+ @cindex function without a prologue/epilogue code on the AVR processors
+ Use this option on the AVR to indicate that the specified
+ function don't have a prologue/epilogue.  The compiler don't generate
+ function entry and exit sequences.
+ 
  @item model (@var{model-name})
  @cindex function addressability on the M32R/D
  Use this attribute on the M32R/D to set the addressability of an object,





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