patch to fix SH4 mode-switching problems

[Joern Rennecke]

> I think more like
> 
> `CANONICALIZE_COMPARISON (CODE, OP0, OP1)'
>      One some machines not all possible comparisons are defined, but
>      you can convert an invalid comparison into a valid one.  For
>      example, the Alpha does not have a `GT' comparison, but you can
>      use an `LT' comparison instead and swap the order of the operands.
..


All right, how about this?

..
@item OPTIMIZE_MODE_SWITCHING (@var{entity})
Define this macro if the port needs extra instructions inserted for mode
switching in an optimizing compilation.

For an example, the SH4 can perform both single and double precision
floating point operations, but to perform a single precision operation,
the FPSCR PR bit has to be cleared, while for a double precision
operation, this bit has to be set.  Changing the PR bit requires a general
purpose register as a scratch register, hence these FPSCR sets have to
be inserted before reload, i.e. you can't put this into instruction emitting
or MACHINE_DEPENDENT_REORG.

You can have multiple entities that are mode-switched, and select at run time
..

> You shouldn't assume that everyone porting GCC already understands how
> each of the existing ports work.

I didn't assume that.  I wrote '*look* at the SH port.  Not 'remember
what it is like'.