gcc intrinsics for am33 parallel integer arithmetic

[Matthew Hiller]

On 31 Aug 2000, Alexandre Oliva wrote:

> On Aug 31, 2000, Matthew Hiller <hiller@cygnus.com> wrote:
> 
> > +   if (!lvalue_p (arg1))
> > +     error ("operand 1 of dsp intrinsic not an lvalue");
> 
> Shouldn't you still check whether the predicate matches?

	If the arg1's an lvalue, op1 ought to match the predicate. If it'd
be better form to check the predicate as well that shouldn't be a problem.

> > +   pat = GEN_FCN (icode) (op0, op0, op1, op2, op2, op3);
> 
> Since it is op1 and op3 that are output and input operands, this
> doesn't look right to me.

	Ick. Yeah, the line should read:
+   pat = GEN_FCN (icode) (op1, op1, op0, op3, op3, op2);

> > + (define_insn "add_mov"
> > +   [(set (match_operand:SI 0 "nonimmediate_operand" "=&dax")
> > + 	(plus:SI (match_operand:SI 1 "nonimmediate_operand" "0")
> > + 		 (match_operand:SI 2 "general_operand" "idax")))
> > +    (set (match_operand:SI 3 "nonimmediate_operand" "=&dax")
> > + 	(match_operand:SI 5 "general_operand" "idax"))]
> 
> I'm a little bit concerned about skipping operand 4 like that.
> Doesn't this cause any warnings in the md-file processors, or get GCC
> confused?  I'm asking because I don't recall having seen anything like
> this before.

	That was accidental. It doesn't generate any warnings in the
md-file processors, though, and the GEN_FCN invocation does the right
thing even when operand 1 and/or operand 4 aren't used to generate the
insn. So it works, but it's definitely peculiar. I should probably sanify
the pattern numbering and do something like more like this in
am33_expand_dsp_builtin:

switch (icode)
  {
  case CODE_FOR_mov_mov:
    GEN_FCN (icode) (op1, op0, op3, op2);
    break;
  case CODE_FOR_add_mov: case CODE_FOR_sub_mov: ...
    GEN_FCN (icode) (op1, op1, op0, op3, op2);
    break;
  case CODE_FOR_mov_add: caso CODE_FOR_mov_sub: ...
    GEN_FCN (icode) (op1, op0, op3, op3, op2);
    break;
  default:
    GEN_FCN (icode) (op1, op1, op0, op3, op3, op2);
    break;
  }