i386 andsi_1/andhi_1 tweak

[Jan Hubicka]

Hi
The andsi_1 and andhi_1 contains special case, where constant match one of 0xff
and 0xffff to result into movzx instructions.  This is quite useless now, when
combine takes care to convert these ands to zero extends by it's own.

Surprisingly removing that special case not only simplifies the i386.md, but
also led to better code, most probably because regmove then matches more often.
In the bootstrap, 62 out of 139 object files gets shorter after this bit is
removed.

It looks like it is easy to confuse 2-address regmove optimizations by the
extra special-case alternatives.  Perhaps it would be worthwhile to implement
possible_alternatives_mask function that will examine each of the alternatives
and set bit only for those that can possibly match. Regmove and friends then
can take advantage of that knowledge to figure out whether this particular case
may belong to it or not.

Honza

So srp 26 14:43:52 CEST 2000  Jan Hubicka  <jh@suse.cz>

	* (andsi_1, andhi_1):  Remove the movzx case.

*** i386.md.old	Sat Aug 26 12:16:36 2000
--- i386.md	Sat Aug 26 12:29:13 2000
***************
*** 5158,5200 ****
    "ix86_expand_binary_operator (AND, SImode, operands); DONE;")
  
  (define_insn "*andsi_1"
!   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r,r")
! 	(and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,qm")
! 		(match_operand:SI 2 "general_operand" "ri,rm,L")))
     (clobber (reg:CC 17))]
    "ix86_binary_operator_ok (AND, SImode, operands)"
!   "*
! {
!   switch (get_attr_type (insn))
!     {
!     case TYPE_IMOVX:
!       {
! 	enum machine_mode mode;
! 
! 	if (GET_CODE (operands[2]) != CONST_INT)
! 	  abort ();
!         if (INTVAL (operands[2]) == 0xff)
! 	  mode = QImode;
! 	else if (INTVAL (operands[2]) == 0xffff)
! 	  mode = HImode;
! 	else
! 	  abort ();
! 	
! 	operands[1] = gen_lowpart (mode, operands[1]);
! 	if (mode == QImode)
! 	  return \"movz{bl|x}\\t{%1,%0|%0, %1}\";
! 	else
! 	  return \"movz{wl|x}\\t{%1,%0|%0, %1}\";
!       }
! 
!     default:
!       if (! rtx_equal_p (operands[0], operands[1]))
! 	abort ();
!       return \"and{l}\\t{%2, %0|%0, %2}\";
!     }
! }"
!   [(set_attr "type" "alu,alu,imovx")
!    (set_attr "length_immediate" "*,*,0")
     (set_attr "mode" "SI")])
  
  (define_split
--- 5158,5170 ----
    "ix86_expand_binary_operator (AND, SImode, operands); DONE;")
  
  (define_insn "*andsi_1"
!   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
! 	(and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
! 		(match_operand:SI 2 "general_operand" "ri,rm")))
     (clobber (reg:CC 17))]
    "ix86_binary_operator_ok (AND, SImode, operands)"
!   "and{l}\\t{%2, %0|%0, %2}"
!   [(set_attr "type" "alu")
     (set_attr "mode" "SI")])
  
  (define_split
***************
*** 5258,5289 ****
    "ix86_expand_binary_operator (AND, HImode, operands); DONE;")
  
  (define_insn "*andhi_1"
!   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,r")
! 	(and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,qm")
! 		(match_operand:HI 2 "general_operand" "ri,rm,L")))
     (clobber (reg:CC 17))]
    "ix86_binary_operator_ok (AND, HImode, operands)"
!   "*
! {
!   switch (get_attr_type (insn))
!     {
!     case TYPE_IMOVX:
!       if (GET_CODE (operands[2]) != CONST_INT)
! 	abort ();
!       if (INTVAL (operands[2]) == 0xff)
! 	return \"movz{bl|x}\\t{%b1, %k0|%k0, %b1}\";
!       abort ();
! 
!     default:
!       if (! rtx_equal_p (operands[0], operands[1]))
! 	abort ();
! 
!       return \"and{w}\\t{%2, %0|%0, %2}\";
!     }
! }"
!   [(set_attr "type" "alu,alu,imovx")
!    (set_attr "length_immediate" "*,*,0")
!    (set_attr "mode" "HI,HI,SI")])
  
  (define_insn "*andhi_2"
    [(set (reg 17)
--- 5228,5242 ----
    "ix86_expand_binary_operator (AND, HImode, operands); DONE;")
  
  (define_insn "*andhi_1"
!   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
! 	(and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
! 		(match_operand:HI 2 "general_operand" "ri,rm")))
     (clobber (reg:CC 17))]
    "ix86_binary_operator_ok (AND, HImode, operands)"
!   "and{w}\\t{%2, %0|%0, %2}"
!   [(set_attr "type" "alu")
!    (set_attr "length_immediate" "*")
!    (set_attr "mode" "HI")])
  
  (define_insn "*andhi_2"
    [(set (reg 17)