ia64 loop tweek

Richard Henderson rth@cygnus.com
Sun Aug 20 12:01:00 GMT 2000


This is actually kind of a hack, since we should be doing a more
thorough job of this sort of thing.  The change is from e.g.

	mov ar.lc = r17
.L9:
	st4 [r15] = r14, 4
	adds r14 = 1, r14
	;;
	br.cloop.sptk.few .L9

to

	mov ar.lc = r17
	;;
.L9:
	st4 [r15] = r14, 4
	adds r14 = 1, r14
	br.cloop.sptk.few .L9


r~

        * config/ia64/ia64.c (emit_insn_group_barriers): Stop if ar.lc
        assigned before a loop.

Index: ia64.c
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/ia64/ia64.c,v
retrieving revision 1.71.2.10
diff -c -p -d -r1.71.2.10 ia64.c
*** ia64.c	2000/08/19 19:10:33	1.71.2.10
--- ia64.c	2000/08/20 18:47:22
*************** emit_insn_group_barriers (insns)
*** 3934,3939 ****
--- 3934,3954 ----
        switch (GET_CODE (insn))
  	{
  	case NOTE:
+ 	  /* For very small loops we can wind up with extra stop bits
+ 	     inside the loop because of not putting a stop after the
+ 	     assignment to ar.lc before the loop label.  */
+ 	  /* ??? Ideally we'd do this for any register used in the first
+ 	     insn group that's been written recently.  */
+           if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
+ 	    {
+ 	      need_barrier = rws_access_regno (AR_LC_REGNUM, flags, 0);
+ 	      if (need_barrier)
+ 		{
+ 		  emit_insn_after (gen_insn_group_barrier (), insn);
+ 		  memset (rws_sum, 0, sizeof(rws_sum));
+ 		  prev_insn = NULL_RTX;
+ 		}
+ 	    }
  	  break;
  
  	case CALL_INSN:


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