i386 string operation fixes, SSE tweaks etc...
Jan Hubicka
jh@suse.cz
Thu Aug 3 09:26:00 GMT 2000
Hi
This patch fixes number of problems in i386 string patterns:
1) the strset patterns was modeling destination register to double
(not to be increased by the size of block)
2) use address_operand for memory expressions so loop.c and integrate
is happy
3) Don't use match_dup of input operands for outputs, so SSE form of
patterns is possible
4) canonicalizes the ashift inside the plus, so my checker is happy
5) Puts uses last - some parts of gcc seems to assume this.
It obsolettes my previous patch to canonicalize i386.md - the rest
of it I am sending separately in minute.
Honza
Thu Aug 3 18:21:24 MET DST 2000 Jan Hubicka <jh@suse.cz>
* i386.md (strmovsi_1, strmovhi_1 strmovqi_1):
Do not use match_dup of input operands at outputs.
Use address operand for memory expression.
(rep_movsi): Put use last, canonicalize.
(rep_movqi): Put use last.
(strsetsi_1, strset_hi_1, strsetqi_1): Do not use match_dup
of input operands at outputs. Use address operand for memory
expression.
(rep_stossi): Put use last; canonicalize; fix match_dup in
the address expression
(rep_stosqi): Likewise.
(memcmp expander): Update calls.
(cmpstrsi_nz_1, cmpstrsi_1, strlensi_1): Avoid match_dups in
the clobbers.
Index: egcs/gcc/config/i386//i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.170
diff -c -3 -p -r1.170 i386.md
*** i386.md 2000/08/02 14:02:15 1.170
--- i386.md 2000/08/03 16:19:01
***************
*** 9584,9596 ****
}")
(define_insn "strmovsi_1"
! [(set (mem:SI (match_operand:SI 2 "register_operand" "0"))
! (mem:SI (match_operand:SI 3 "register_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 0)
(const_int 4)))
(set (match_operand:SI 1 "register_operand" "=S")
! (plus:SI (match_dup 1)
(const_int 4)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
--- 9558,9570 ----
}")
(define_insn "strmovsi_1"
! [(set (mem:SI (match_operand:SI 2 "address_operand" "0"))
! (mem:SI (match_operand:SI 3 "address_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 2)
(const_int 4)))
(set (match_operand:SI 1 "register_operand" "=S")
! (plus:SI (match_dup 3)
(const_int 4)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
***************
*** 9600,9612 ****
(set_attr "memory" "both")])
(define_insn "strmovhi_1"
! [(set (mem:HI (match_operand:SI 2 "register_operand" "0"))
! (mem:HI (match_operand:SI 3 "register_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 0)
(const_int 2)))
(set (match_operand:SI 1 "register_operand" "=S")
! (plus:SI (match_dup 1)
(const_int 2)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
--- 9574,9586 ----
(set_attr "memory" "both")])
(define_insn "strmovhi_1"
! [(set (mem:HI (match_operand:SI 2 "address_operand" "0"))
! (mem:HI (match_operand:SI 3 "address_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 2)
(const_int 2)))
(set (match_operand:SI 1 "register_operand" "=S")
! (plus:SI (match_dup 3)
(const_int 2)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
***************
*** 9616,9628 ****
(set_attr "mode" "HI")])
(define_insn "strmovqi_1"
! [(set (mem:QI (match_operand:SI 2 "register_operand" "0"))
! (mem:QI (match_operand:SI 3 "register_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 0)
(const_int 1)))
(set (match_operand:SI 1 "register_operand" "=S")
! (plus:SI (match_dup 1)
(const_int 1)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
--- 9590,9602 ----
(set_attr "mode" "HI")])
(define_insn "strmovqi_1"
! [(set (mem:QI (match_operand:SI 2 "address_operand" "0"))
! (mem:QI (match_operand:SI 3 "address_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 2)
(const_int 1)))
(set (match_operand:SI 1 "register_operand" "=S")
! (plus:SI (match_dup 3)
(const_int 1)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
***************
*** 9637,9651 ****
(define_insn "rep_movsi"
[(set (match_operand:SI 2 "register_operand" "=c") (const_int 0))
- (use (match_operand:SI 5 "register_operand" "2"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_operand:SI 3 "address_operand" "0")
! (ashift:SI (match_dup 5) (const_int 2))))
(set (match_operand:SI 1 "register_operand" "=S")
! (plus:SI (match_operand:SI 4 "address_operand" "1")
! (ashift:SI (match_dup 5) (const_int 2))))
(set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4)))
(use (reg:SI 19))]
""
"rep\;movsl|rep movsd"
--- 9611,9626 ----
(define_insn "rep_movsi"
[(set (match_operand:SI 2 "register_operand" "=c") (const_int 0))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (ashift:SI (match_operand:SI 5 "register_operand" "2")
! (const_int 2))
! (match_operand:SI 3 "address_operand" "0")))
(set (match_operand:SI 1 "register_operand" "=S")
! (plus:SI (ashift:SI (match_dup 5) (const_int 2))
! (match_operand:SI 4 "address_operand" "1")))
(set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4)))
+ (use (match_dup 5))
(use (reg:SI 19))]
""
"rep\;movsl|rep movsd"
***************
*** 9656,9668 ****
(define_insn "rep_movqi"
[(set (match_operand:SI 2 "register_operand" "=c") (const_int 0))
- (use (match_operand:SI 5 "register_operand" "2"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_operand:SI 3 "address_operand" "0") (match_dup 5)))
(set (match_operand:SI 1 "register_operand" "=S")
(plus:SI (match_operand:SI 4 "address_operand" "1") (match_dup 5)))
(set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4)))
(use (reg:SI 19))]
""
"rep\;movsb|rep movsb"
--- 9631,9644 ----
(define_insn "rep_movqi"
[(set (match_operand:SI 2 "register_operand" "=c") (const_int 0))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_operand:SI 3 "address_operand" "0")
! (match_operand:SI 5 "register_operand" "2")))
(set (match_operand:SI 1 "register_operand" "=S")
(plus:SI (match_operand:SI 4 "address_operand" "1") (match_dup 5)))
(set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4)))
+ (use (match_dup 5))
(use (reg:SI 19))]
""
"rep\;movsb|rep movsb"
***************
*** 9888,9897 ****
}")
(define_insn "strsetsi_1"
! [(set (mem:SI (match_operand:SI 1 "register_operand" "0"))
(match_operand:SI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 0)
(const_int 4)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
--- 9864,9873 ----
}")
(define_insn "strsetsi_1"
! [(set (mem:SI (match_operand:SI 1 "address_operand" "0"))
(match_operand:SI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 1)
(const_int 4)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
***************
*** 9901,9910 ****
(set_attr "mode" "SI")])
(define_insn "strsethi_1"
! [(set (mem:HI (match_operand:SI 1 "register_operand" "0"))
(match_operand:HI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 0)
(const_int 2)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
--- 9877,9886 ----
(set_attr "mode" "SI")])
(define_insn "strsethi_1"
! [(set (mem:HI (match_operand:SI 1 "address_operand" "0"))
(match_operand:HI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 1)
(const_int 2)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
***************
*** 9914,9923 ****
(set_attr "mode" "HI")])
(define_insn "strsetqi_1"
! [(set (mem:QI (match_operand:SI 1 "register_operand" "0"))
(match_operand:QI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 0)
(const_int 1)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
--- 9890,9899 ----
(set_attr "mode" "HI")])
(define_insn "strsetqi_1"
! [(set (mem:QI (match_operand:SI 1 "address_operand" "0"))
(match_operand:QI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_dup 1)
(const_int 1)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
***************
*** 9932,9944 ****
(define_insn "rep_stossi"
[(set (match_operand:SI 1 "register_operand" "=c") (const_int 0))
- (use (match_operand:SI 2 "register_operand" "a"))
- (use (match_operand:SI 4 "register_operand" "1"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_operand:SI 3 "address_operand" "0")
! (ashift:SI (match_dup 3) (const_int 2))))
(set (mem:BLK (match_dup 3))
(const_int 0))
(use (reg:SI 19))]
""
"rep\;stosl|rep stosd"
--- 9908,9921 ----
(define_insn "rep_stossi"
[(set (match_operand:SI 1 "register_operand" "=c") (const_int 0))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (ashift:SI (match_operand:SI 4 "register_operand" "1")
! (const_int 2))
! (match_operand:SI 3 "address_operand" "0")))
(set (mem:BLK (match_dup 3))
(const_int 0))
+ (use (match_operand:SI 2 "register_operand" "a"))
+ (use (match_dup 4))
(use (reg:SI 19))]
""
"rep\;stosl|rep stosd"
***************
*** 9949,9960 ****
(define_insn "rep_stosqi"
[(set (match_operand:SI 1 "register_operand" "=c") (const_int 0))
- (use (match_operand:QI 2 "register_operand" "a"))
- (use (match_operand:SI 4 "register_operand" "1"))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_operand:SI 3 "address_operand" "0") (match_dup 3)))
(set (mem:BLK (match_dup 3))
(const_int 0))
(use (reg:SI 19))]
""
"rep\;stosb|rep stosb"
--- 9926,9938 ----
(define_insn "rep_stosqi"
[(set (match_operand:SI 1 "register_operand" "=c") (const_int 0))
(set (match_operand:SI 0 "register_operand" "=D")
! (plus:SI (match_operand:SI 3 "address_operand" "0")
! (match_operand:SI 4 "register_operand" "1")))
(set (mem:BLK (match_dup 3))
(const_int 0))
+ (use (match_operand:QI 2 "register_operand" "a"))
+ (use (match_dup 4))
(use (reg:SI 19))]
""
"rep\;stosb|rep stosb"
***************
*** 9997,10008 ****
emit_move_insn (operands[0], const0_rtx);
DONE;
}
! emit_insn (gen_cmpstrsi_nz_1 (addr1, addr2, countreg, align));
}
else
{
emit_insn (gen_cmpsi_1 (countreg, countreg));
! emit_insn (gen_cmpstrsi_1 (addr1, addr2, countreg, align));
}
outlow = gen_lowpart (QImode, out);
--- 9975,9988 ----
emit_move_insn (operands[0], const0_rtx);
DONE;
}
! emit_insn (gen_cmpstrsi_nz_1 (addr1, addr2, countreg, align,
! addr1, addr2, countreg));
}
else
{
emit_insn (gen_cmpsi_1 (countreg, countreg));
! emit_insn (gen_cmpstrsi_1 (addr1, addr2, countreg, align,
! addr1, addr2, countreg));
}
outlow = gen_lowpart (QImode, out);
***************
*** 10039,10052 ****
(define_insn "cmpstrsi_nz_1"
[(set (reg:CC 17)
! (compare:CC (mem:BLK (match_operand:SI 0 "address_operand" "S"))
! (mem:BLK (match_operand:SI 1 "address_operand" "D"))))
! (use (match_operand:SI 2 "register_operand" "c"))
(use (match_operand:SI 3 "immediate_operand" "i"))
(use (reg:SI 19))
! (clobber (match_dup 0))
! (clobber (match_dup 1))
! (clobber (match_dup 2))]
""
"repz{\;| }cmpsb"
[(set_attr "type" "str")
--- 10019,10032 ----
(define_insn "cmpstrsi_nz_1"
[(set (reg:CC 17)
! (compare:CC (mem:BLK (match_operand:SI 4 "address_operand" "0"))
! (mem:BLK (match_operand:SI 5 "address_operand" "1"))))
! (use (match_operand:SI 6 "register_operand" "2"))
(use (match_operand:SI 3 "immediate_operand" "i"))
(use (reg:SI 19))
! (clobber (match_operand:SI 0 "register_operand" "=S"))
! (clobber (match_operand:SI 1 "register_operand" "=D"))
! (clobber (match_operand:SI 2 "register_operand" "=c"))]
""
"repz{\;| }cmpsb"
[(set_attr "type" "str")
***************
*** 10057,10073 ****
(define_insn "cmpstrsi_1"
[(set (reg:CC 17)
! (if_then_else:CC (ne (match_operand:SI 2 "register_operand" "c")
(const_int 0))
! (compare:SI (mem:BLK (match_operand:SI 0 "address_operand" "S"))
! (mem:BLK (match_operand:SI 1 "address_operand" "D")))
(const_int 0)))
(use (match_operand:SI 3 "immediate_operand" "i"))
(use (reg:CC 17))
(use (reg:SI 19))
! (clobber (match_dup 0))
! (clobber (match_dup 1))
! (clobber (match_dup 2))]
""
"repz{\;| }cmpsb"
[(set_attr "type" "str")
--- 10037,10053 ----
(define_insn "cmpstrsi_1"
[(set (reg:CC 17)
! (if_then_else:CC (ne (match_operand:SI 6 "register_operand" "2")
(const_int 0))
! (compare:SI (mem:BLK (match_operand:SI 4 "address_operand" "0"))
! (mem:BLK (match_operand:SI 5 "address_operand" "1")))
(const_int 0)))
(use (match_operand:SI 3 "immediate_operand" "i"))
(use (reg:CC 17))
(use (reg:SI 19))
! (clobber (match_operand:SI 0 "register_operand" "=S"))
! (clobber (match_operand:SI 1 "register_operand" "=D"))
! (clobber (match_operand:SI 2 "register_operand" "=c"))]
""
"repz{\;| }cmpsb"
[(set_attr "type" "str")
***************
*** 10131,10137 ****
emit_insn (gen_cld ());
emit_insn (gen_strlensi_1 (scratch1, scratch3, eoschar,
! align, constm1_rtx));
emit_insn (gen_one_cmplsi2 (scratch2, scratch1));
emit_insn (gen_addsi3 (out, scratch2, constm1_rtx));
}
--- 10111,10117 ----
emit_insn (gen_cld ());
emit_insn (gen_strlensi_1 (scratch1, scratch3, eoschar,
! align, constm1_rtx, scratch3));
emit_insn (gen_one_cmplsi2 (scratch2, scratch1));
emit_insn (gen_addsi3 (out, scratch2, constm1_rtx));
}
***************
*** 10144,10155 ****
(define_insn "strlensi_1"
[(set (match_operand:SI 0 "register_operand" "=&c")
! (unspec:SI [(mem:BLK (match_operand:SI 1 "address_operand" "D"))
(match_operand:QI 2 "general_operand" "a")
(match_operand:SI 3 "immediate_operand" "i")
(match_operand:SI 4 "immediate_operand" "0")] 0))
(use (reg:SI 19))
! (clobber (match_dup 1))
(clobber (reg:CC 17))]
""
"repnz{\;| }scasb"
--- 10124,10135 ----
(define_insn "strlensi_1"
[(set (match_operand:SI 0 "register_operand" "=&c")
! (unspec:SI [(mem:BLK (match_operand:SI 5 "address_operand" "1"))
(match_operand:QI 2 "general_operand" "a")
(match_operand:SI 3 "immediate_operand" "i")
(match_operand:SI 4 "immediate_operand" "0")] 0))
(use (reg:SI 19))
! (clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (reg:CC 17))]
""
"repnz{\;| }scasb"
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