Fix CPP_SPECs and ASM_SPECs for MIPS-Linux

[jaeger@informatik.uni-kl.de]

The CPP_SPECs and the ASM_SPEC for MIPS/Linux are not correct.
MIPS/Linux needs a number of flags which aren't provided.  The
appended patch fixes these problems.

I've copied the code from the iris6.h header for
SUBTARGET_CPP_SIZE_SPEC and SUBTARGET_CPP_SPEC and made some small
enhancements (the default for MIPS/Linux is MIPS1 not MIPS3).  I also
added some defines which are used everywhere else on Linux.

Since PIC is default on MIPS/Linux, we should define some additional
macros.  A lot of code uses __PIC__ to check for PIC code.  The
ASM_SPECs are also corrected for usage with and without PIC code.

Ralf Baechle has checked the patch.

Andreas


2000-04-05  Andreas Jaeger  <aj@suse.de>

	* config/mips/linux.h (SUBTARGET_ASM_SPEC): Use proper flags if
	not compiling PIC code, add flags for mabi=64.
	(SUBTARGET_CPP_SIZE_SPEC): New.
	(SUBTARGET_CPP_SPEC): New.
	(CPP_PREDEFINES): Define __PIC__ and __pic__.  PIC code is default
	for MIPS/Linux and lots of code needs these defines.

Index: config/mips/linux.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/mips/linux.h,v
retrieving revision 1.11
diff -u -r1.11 linux.h
--- linux.h	2000/03/10 14:24:50	1.11
+++ linux.h	2000/04/06 00:47:39
@@ -68,9 +68,56 @@
 #else
 #define CPP_PREDEFINES "-DMIPSEB -D_MIPSEB -Dunix -Dmips -D_mips \
 -DR3000 -D_R3000 -Dlinux -Asystem(posix) -Acpu(mips) \
--Amachine(mips) -D__ELF__"
+-Amachine(mips) -D__ELF__ -D__PIC__ -D__pic__"
 #endif
 
+#undef SUBTARGET_CPP_SIZE_SPEC
+#define SUBTARGET_CPP_SIZE_SPEC "\
+%{mabi=32: -D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
+%{mabi=n32: -D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
+%{mabi=64: -D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int} \
+%{!mabi*: -D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int}"
+
+/* We must make -mips3 do what -mlong64 used to do.  */
+/* ??? If no mipsX option given, but a mabi=X option is, then should set
+   _MIPS_ISA based on the mabi=X option.  */
+/* ??? If no mabi=X option give, but a mipsX option is, then should set
+   _MIPS_SIM based on the mipsX option.  */
+/* ??? Same for _MIPS_SZINT.  */
+/* ??? Same for _MIPS_SZPTR.  */
+/* ??? Same for __SIZE_TYPE and __PTRDIFF_TYPE.  */
+#undef SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC "\
+%{mfp32: -D_MIPS_FPSET=16} \
+%{mfp64: -D_MIPS_FPSET=32} \
+%{!mfp*: -D_MIPS_FPSET=32} \
+%{mips1: -D_MIPS_ISA=_MIPS_ISA_MIPS1} \
+%{mips2: -D_MIPS_ISA=_MIPS_ISA_MIPS2} \
+%{mips3: -D_MIPS_ISA=_MIPS_ISA_MIPS3} \
+%{mips4: -D_MIPS_ISA=_MIPS_ISA_MIPS4} \
+%{!mips*: -D_MIPS_ISA=_MIPS_ISA_MIPS3} \
+%{mabi=32: -D_MIPS_SIM=_MIPS_SIM_ABI32}	\
+%{mabi=n32: -D_ABIN32=2 -D_MIPS_SIM=_ABIN32} \
+%{mabi=64: -D_ABI64=3 -D_MIPS_SIM=_ABI64} \
+%{!mabi*: -D_ABIN32=2 -D_MIPS_SIM=_ABIN32} \
+%{!mint64: -D_MIPS_SZINT=32}%{mint64: -D_MIPS_SZINT=64} \
+%{mabi=32: -D_MIPS_SZLONG=32} \
+%{mabi=n32: -D_MIPS_SZLONG=32} \
+%{mabi=64: -D_MIPS_SZLONG=64} \
+%{!mabi*: -D_MIPS_SZLONG=32} \
+%{mabi=32: -D_MIPS_SZPTR=32} \
+%{mabi=n32: -D_MIPS_SZPTR=32} \
+%{mabi=64: -D_MIPS_SZPTR=64} \
+%{!mabi*: -D_MIPS_SZPTR=32} \
+%{!mips*: -U__mips -D__mips} \
+%{mabi=32: -U__mips64} \
+%{mabi=n32: -D__mips64} \
+%{mabi=64: -U__mips64} \
+%{!mabi*: -U__mips64} \
+%{fno-PIC:-U__PIC__ -U__pic__} %{fno-pic:-U__PIC__ -U__pic__} \
+%{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} \
+%{pthread:-D_REENTRANT}"
+
 /* Provide a STARTFILE_SPEC appropriate for GNU/Linux.  Here we add
    the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
    provides part of the support for getting C++ file-scope static
@@ -117,7 +164,10 @@
 
 
 #undef SUBTARGET_ASM_SPEC
-#define SUBTARGET_ASM_SPEC "-KPIC"
+#define SUBTARGET_ASM_SPEC "\
+%{mabi=64: -64} \
+%{!fno-PIC:%{!fno-pic:-KPIC}} \
+%{fno-PIC:-non_shared} %{fno-pic:-non_shared}"
 
 /* Undefine the following which were defined in elf.h.  This will cause the linux
    port to continue to use collect2 for constructors/destructors.  These may be removed


-- 
 Andreas Jaeger
  SuSE Labs aj@suse.de