PATCH for insn_data.genfun and usage
Steve Chamberlain
sac@transmeta.com
Fri Sep 24 11:58:00 GMT 1999
I'm putting the finishing touches to a port of gcc to picoJava.
Efficient C parameter passing in picoJava has some pretty unusual
constraints. I found some lints while three staging:
In recog.h there is:
typedef rtx (*insn_gen_fn) PROTO ((rtx, ...));
The typedef is used to declare the pointers to the instruction
generators in the insn_data struct. But the callees are not variadic.
In my picoJava gcc world, omitting the prototype is fine and just
leads to slightly poorer code, but being explicit and wrong damages
the stack.
These patches add typedefs for the four different signatures uses of
insn_gen_fn, replaces the GEN_FCN macro with GEN_FCN_<n> macros, and
change all the uses in the source of GEN_FCN to the appropriate
GEN_FCN_<n>.
On normal machines, the patches will have no effect. I've compiled up
an i386 cc1 before and after the patches, and the images are identical
save for the debugging information.
Fri Sep 24 10:39:45 1999 Steve Chamberlain <sac@pobox.com>
* expr.h (GEN_FCN): Replace with GEN_FCN_{1,2,3,4}
* recog.h (insn_gen_fn): Replace with insn_gen_fn_{1,2,3,4}
* builtins.c: Replace GEN_FCN usage with appropriate GEN_FCN_<n>
* expmed.c: Likewise.
* loop.c: Likewise.
* optabs.c: Likewise.
* regmove.c: Likewise.
* reload1.c: Likewise.
* expr.c: Likewise
(move_by_pieces_1, clear_by_pieces_1): Adjust declarations to match true
signature of genfun.
Index: expr.h
===================================================================
RCS file: /cvs/egcs/egcs/gcc/expr.h,v
retrieving revision 1.49
diff -c -3 -p -r1.49 expr.h
*** expr.h 1999/09/23 11:34:47 1.49
--- expr.h 1999/09/24 17:29:06
*************** typedef struct optab
*** 286,294 ****
So produce the pointer-to-function directly.
Luckily, these compilers seem to work properly when you
call the pointer-to-function. */
! #define GEN_FCN(CODE) (insn_data[(int) (CODE)].genfun)
#else
! #define GEN_FCN(CODE) (*insn_data[(int) (CODE)].genfun)
#endif
/* Enumeration of valid indexes into optab_table. */
--- 286,300 ----
So produce the pointer-to-function directly.
Luckily, these compilers seem to work properly when you
call the pointer-to-function. */
! #define GEN_FCN_1(CODE) ((insn_gen_fn_1)(insn_data[(int) (CODE)].genfun))
! #define GEN_FCN_2(CODE) ((insn_gen_fn_2)(insn_data[(int) (CODE)].genfun))
! #define GEN_FCN_3(CODE) ((insn_gen_fn_3)(insn_data[(int) (CODE)].genfun))
! #define GEN_FCN_4(CODE) ((insn_gen_fn_4)(insn_data[(int) (CODE)].genfun))
#else
! #define GEN_FCN_1(CODE) (*(insn_gen_fn_1)(insn_data[(int) (CODE)].genfun))
! #define GEN_FCN_2(CODE) (*(insn_gen_fn_2)(insn_data[(int) (CODE)].genfun))
! #define GEN_FCN_3(CODE) (*(insn_gen_fn_3)(insn_data[(int) (CODE)].genfun))
! #define GEN_FCN_4(CODE) (*(insn_gen_fn_4)(insn_data[(int) (CODE)].genfun))
#endif
/* Enumeration of valid indexes into optab_table. */
Index: recog.h
===================================================================
RCS file: /cvs/egcs/egcs/gcc/recog.h,v
retrieving revision 1.23
diff -c -3 -p -r1.23 recog.h
*** recog.h 1999/09/14 23:23:17 1.23
--- recog.h 1999/09/24 17:29:06
*************** extern struct operand_alternative recog_
*** 199,207 ****
typedef int (*insn_operand_predicate_fn) PROTO ((rtx, enum machine_mode));
typedef const char * (*insn_output_fn) PROTO ((rtx *, rtx));
#ifndef NO_MD_PROTOTYPES
! typedef rtx (*insn_gen_fn) PROTO ((rtx, ...));
#else
! typedef rtx (*insn_gen_fn) ();
#endif
struct insn_operand_data
--- 199,213 ----
typedef int (*insn_operand_predicate_fn) PROTO ((rtx, enum machine_mode));
typedef const char * (*insn_output_fn) PROTO ((rtx *, rtx));
#ifndef NO_MD_PROTOTYPES
! typedef rtx (*insn_gen_fn_1) PROTO ((rtx));
! typedef rtx (*insn_gen_fn_2) PROTO ((rtx, rtx));
! typedef rtx (*insn_gen_fn_3) PROTO ((rtx, rtx, rtx));
! typedef rtx (*insn_gen_fn_4) PROTO ((rtx, rtx, rtx, rtx));
#else
! typedef rtx (*insn_gen_fn_1) ();
! typedef rtx (*insn_gen_fn_2) ();
! typedef rtx (*insn_gen_fn_3) ();
! typedef rtx (*insn_gen_fn_4) ();
#endif
struct insn_operand_data
*************** struct insn_data
*** 232,238 ****
{
const char *name;
const PTR output;
! insn_gen_fn genfun;
const struct insn_operand_data *operand;
char n_operands;
--- 238,244 ----
{
const char *name;
const PTR output;
! const PTR genfun;
const struct insn_operand_data *operand;
char n_operands;
Index: builtins.c
===================================================================
RCS file: /cvs/egcs/egcs/gcc/builtins.c,v
retrieving revision 1.13
diff -c -3 -p -r1.13 builtins.c
*** builtins.c 1999/09/23 12:36:04 1.13
--- builtins.c 1999/09/24 17:28:33
*************** expand_builtin_strlen (exp, target, mode
*** 1356,1362 ****
if (! (*insn_data[(int)icode].operand[2].predicate) (char_rtx, char_mode))
char_rtx = copy_to_mode_reg (char_mode, char_rtx);
! emit_insn (GEN_FCN (icode) (result,
gen_rtx_MEM (BLKmode, src_rtx),
char_rtx, GEN_INT (align)));
--- 1356,1362 ----
if (! (*insn_data[(int)icode].operand[2].predicate) (char_rtx, char_mode))
char_rtx = copy_to_mode_reg (char_mode, char_rtx);
! emit_insn (GEN_FCN_4 (icode) (result,
gen_rtx_MEM (BLKmode, src_rtx),
char_rtx, GEN_INT (align)));
Index: expmed.c
===================================================================
RCS file: /cvs/egcs/egcs/gcc/expmed.c,v
retrieving revision 1.40
diff -c -3 -p -r1.40 expmed.c
*** expmed.c 1999/09/23 11:34:47 1.40
--- expmed.c 1999/09/24 17:28:43
*************** store_bit_field (str_rtx, bitsize, bitnu
*** 367,373 ****
abort ();
}
! emit_insn (GEN_FCN (icode)
(gen_rtx_SUBREG (fieldmode, op0, offset), value));
}
return value;
--- 367,373 ----
abort ();
}
! emit_insn (GEN_FCN_2 (icode)
(gen_rtx_SUBREG (fieldmode, op0, offset), value));
}
return value;
*************** emit_store_flag (target, code, op0, op1,
*** 4247,4253 ****
|| ! (*pred) (subtarget, compare_mode))
subtarget = gen_reg_rtx (compare_mode);
! pattern = GEN_FCN (icode) (subtarget);
if (pattern)
{
emit_insn (pattern);
--- 4247,4253 ----
|| ! (*pred) (subtarget, compare_mode))
subtarget = gen_reg_rtx (compare_mode);
! pattern = GEN_FCN_1 (icode) (subtarget);
if (pattern)
{
emit_insn (pattern);
Index: expr.c
===================================================================
RCS file: /cvs/egcs/egcs/gcc/expr.c,v
retrieving revision 1.174
diff -c -3 -p -r1.174 expr.c
*** expr.c 1999/09/23 11:34:48 1.174
--- expr.c 1999/09/24 17:28:48
*************** static rtx get_push_address PROTO ((int)
*** 132,141 ****
static rtx enqueue_insn PROTO((rtx, rtx));
static int move_by_pieces_ninsns PROTO((unsigned int, int));
! static void move_by_pieces_1 PROTO((rtx (*) (rtx, ...), enum machine_mode,
struct move_by_pieces *));
static void clear_by_pieces PROTO((rtx, int, int));
! static void clear_by_pieces_1 PROTO((rtx (*) (rtx, ...),
enum machine_mode,
struct clear_by_pieces *));
static int is_zeros_p PROTO((tree));
--- 132,141 ----
static rtx enqueue_insn PROTO((rtx, rtx));
static int move_by_pieces_ninsns PROTO((unsigned int, int));
! static void move_by_pieces_1 PROTO((rtx (*) (rtx, rtx), enum machine_mode ,
struct move_by_pieces *));
static void clear_by_pieces PROTO((rtx, int, int));
! static void clear_by_pieces_1 PROTO((rtx (*) (rtx, rtx),
enum machine_mode,
struct clear_by_pieces *));
static int is_zeros_p PROTO((tree));
*************** move_by_pieces (to, from, len, align)
*** 1454,1460 ****
if (icode != CODE_FOR_nothing
&& align >= MIN (BIGGEST_ALIGNMENT / BITS_PER_UNIT,
GET_MODE_SIZE (mode)))
! move_by_pieces_1 (GEN_FCN (icode), mode, &data);
max_size = GET_MODE_SIZE (mode);
}
--- 1454,1460 ----
if (icode != CODE_FOR_nothing
&& align >= MIN (BIGGEST_ALIGNMENT / BITS_PER_UNIT,
GET_MODE_SIZE (mode)))
! move_by_pieces_1 (GEN_FCN_2 (icode), mode, &data);
max_size = GET_MODE_SIZE (mode);
}
*************** move_by_pieces_ninsns (l, align)
*** 1510,1516 ****
static void
move_by_pieces_1 (genfun, mode, data)
! rtx (*genfun) PROTO ((rtx, ...));
enum machine_mode mode;
struct move_by_pieces *data;
{
--- 1510,1516 ----
static void
move_by_pieces_1 (genfun, mode, data)
! rtx (*genfun) PROTO ((rtx, rtx));
enum machine_mode mode;
struct move_by_pieces *data;
{
*************** emit_block_move (x, y, size, align)
*** 1639,1645 ****
if (pred != 0 && ! (*pred) (op2, mode))
op2 = copy_to_mode_reg (mode, op2);
! pat = GEN_FCN ((int) code) (x, y, op2, opalign);
if (pat)
{
emit_insn (pat);
--- 1639,1645 ----
if (pred != 0 && ! (*pred) (op2, mode))
op2 = copy_to_mode_reg (mode, op2);
! pat = GEN_FCN_4 ((int) code) (x, y, op2, opalign);
if (pat)
{
emit_insn (pat);
*************** clear_by_pieces (to, len, align)
*** 2299,2305 ****
if (icode != CODE_FOR_nothing
&& align >= MIN (BIGGEST_ALIGNMENT / BITS_PER_UNIT,
GET_MODE_SIZE (mode)))
! clear_by_pieces_1 (GEN_FCN (icode), mode, &data);
max_size = GET_MODE_SIZE (mode);
}
--- 2299,2305 ----
if (icode != CODE_FOR_nothing
&& align >= MIN (BIGGEST_ALIGNMENT / BITS_PER_UNIT,
GET_MODE_SIZE (mode)))
! clear_by_pieces_1 (GEN_FCN_2 (icode), mode, &data);
max_size = GET_MODE_SIZE (mode);
}
*************** clear_by_pieces (to, len, align)
*** 2315,2321 ****
static void
clear_by_pieces_1 (genfun, mode, data)
! rtx (*genfun) PROTO ((rtx, ...));
enum machine_mode mode;
struct clear_by_pieces *data;
{
--- 2315,2321 ----
static void
clear_by_pieces_1 (genfun, mode, data)
! rtx (*genfun) PROTO ((rtx, rtx));
enum machine_mode mode;
struct clear_by_pieces *data;
{
*************** clear_storage (object, size, align)
*** 2411,2417 ****
if (pred != 0 && ! (*pred) (op1, mode))
op1 = copy_to_mode_reg (mode, op1);
! pat = GEN_FCN ((int) code) (object, op1, opalign);
if (pat)
{
emit_insn (pat);
--- 2411,2417 ----
if (pred != 0 && ! (*pred) (op1, mode))
op1 = copy_to_mode_reg (mode, op1);
! pat = GEN_FCN_3 ((int) code) (object, op1, opalign);
if (pat)
{
emit_insn (pat);
*************** emit_move_insn_1 (x, y)
*** 2588,2594 ****
if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
return
! emit_insn (GEN_FCN (mov_optab->handlers[(int) mode].insn_code) (x, y));
/* Expand complex moves by moving real part and imag part, if possible. */
else if ((class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT)
--- 2588,2594 ----
if (mov_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
return
! emit_insn (GEN_FCN_2 (mov_optab->handlers[(int) mode].insn_code) (x, y));
/* Expand complex moves by moving real part and imag part, if possible. */
else if ((class == MODE_COMPLEX_FLOAT || class == MODE_COMPLEX_INT)
*************** emit_move_insn_1 (x, y)
*** 2613,2629 ****
/* Note that the real part always precedes the imag part in memory
regardless of machine's endianness. */
#ifdef STACK_GROWS_DOWNWARD
! emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, (XEXP (x, 0))),
gen_imagpart (submode, y)));
! emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, (XEXP (x, 0))),
gen_realpart (submode, y)));
#else
! emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, (XEXP (x, 0))),
gen_realpart (submode, y)));
! emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, (XEXP (x, 0))),
gen_imagpart (submode, y)));
#endif
--- 2613,2629 ----
/* Note that the real part always precedes the imag part in memory
regardless of machine's endianness. */
#ifdef STACK_GROWS_DOWNWARD
! emit_insn (GEN_FCN_2 (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, (XEXP (x, 0))),
gen_imagpart (submode, y)));
! emit_insn (GEN_FCN_2 (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, (XEXP (x, 0))),
gen_realpart (submode, y)));
#else
! emit_insn (GEN_FCN_2 (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, (XEXP (x, 0))),
gen_realpart (submode, y)));
! emit_insn (GEN_FCN_2 (mov_optab->handlers[(int) submode].insn_code)
(gen_rtx_MEM (submode, (XEXP (x, 0))),
gen_imagpart (submode, y)));
#endif
*************** emit_move_insn_1 (x, y)
*** 2688,2696 ****
emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
}
! emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
(gen_realpart (submode, x), gen_realpart (submode, y)));
! emit_insn (GEN_FCN (mov_optab->handlers[(int) submode].insn_code)
(gen_imagpart (submode, x), gen_imagpart (submode, y)));
}
--- 2688,2696 ----
emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
}
! emit_insn (GEN_FCN_2 (mov_optab->handlers[(int) submode].insn_code)
(gen_realpart (submode, x), gen_realpart (submode, y)));
! emit_insn (GEN_FCN_2 (mov_optab->handlers[(int) submode].insn_code)
(gen_imagpart (submode, x), gen_imagpart (submode, y)));
}
*************** emit_push_insn (x, mode, type, size, ali
*** 3074,3080 ****
if (pred != 0 && ! (*pred) (op2, mode))
op2 = copy_to_mode_reg (mode, op2);
! pat = GEN_FCN ((int) code) (target, xinner,
op2, opalign);
if (pat)
{
--- 3074,3080 ----
if (pred != 0 && ! (*pred) (op2, mode))
op2 = copy_to_mode_reg (mode, op2);
! pat = GEN_FCN_4 ((int) code) (target, xinner,
op2, opalign);
if (pat)
{
*************** expand_increment (exp, post, ignore)
*** 8500,8506 ****
if (! (*insn_data[icode].operand[2].predicate) (op1, mode))
op1 = force_reg (mode, op1);
! return enqueue_insn (op0, GEN_FCN (icode) (op0, op0, op1));
}
if (icode != (int) CODE_FOR_nothing && GET_CODE (op0) == MEM)
{
--- 8500,8506 ----
if (! (*insn_data[icode].operand[2].predicate) (op1, mode))
op1 = force_reg (mode, op1);
! return enqueue_insn (op0, GEN_FCN_3 (icode) (op0, op0, op1));
}
if (icode != (int) CODE_FOR_nothing && GET_CODE (op0) == MEM)
{
*************** expand_increment (exp, post, ignore)
*** 8517,8523 ****
/* The increment queue is LIFO, thus we have to `queue'
the instructions in reverse order. */
enqueue_insn (op0, gen_move_insn (op0, temp));
! result = enqueue_insn (temp, GEN_FCN (icode) (temp, temp, op1));
return result;
}
}
--- 8517,8523 ----
/* The increment queue is LIFO, thus we have to `queue'
the instructions in reverse order. */
enqueue_insn (op0, gen_move_insn (op0, temp));
! result = enqueue_insn (temp, GEN_FCN_3 (icode) (temp, temp, op1));
return result;
}
}
Index: loop.c
===================================================================
RCS file: /cvs/egcs/egcs/gcc/loop.c,v
retrieving revision 1.188
diff -c -3 -p -r1.188 loop.c
*** loop.c 1999/09/20 09:59:49 1.188
--- loop.c 1999/09/24 17:28:54
*************** check_dbra_loop (loop_end, insn_count, l
*** 8149,8155 ****
return 0;
start_value
= gen_rtx_PLUS (mode, comparison_value, offset);
! emit_insn_before ((GEN_FCN (icode)
(reg, comparison_value, offset)),
loop_start);
if (GET_CODE (comparison) == LE)
--- 8149,8155 ----
return 0;
start_value
= gen_rtx_PLUS (mode, comparison_value, offset);
! emit_insn_before ((GEN_FCN_3 (icode)
(reg, comparison_value, offset)),
loop_start);
if (GET_CODE (comparison) == LE)
*************** check_dbra_loop (loop_end, insn_count, l
*** 8169,8175 ****
return 0;
start_value
= gen_rtx_MINUS (mode, comparison_value, initial_value);
! emit_insn_before ((GEN_FCN (icode)
(reg, comparison_value, initial_value)),
loop_start);
}
--- 8169,8175 ----
return 0;
start_value
= gen_rtx_MINUS (mode, comparison_value, initial_value);
! emit_insn_before ((GEN_FCN_3 (icode)
(reg, comparison_value, initial_value)),
loop_start);
}
Index: optabs.c
===================================================================
RCS file: /cvs/egcs/egcs/gcc/optabs.c,v
retrieving revision 1.51
diff -c -3 -p -r1.51 optabs.c
*** optabs.c 1999/09/23 11:34:47 1.51
--- optabs.c 1999/09/24 17:28:56
*************** expand_binop (mode, binoptab, op0, op1,
*** 724,730 ****
if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
temp = gen_reg_rtx (mode);
! pat = GEN_FCN (icode) (temp, xop0, xop1);
if (pat)
{
/* If PAT is a multi-insn sequence, try to add an appropriate
--- 724,730 ----
if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
temp = gen_reg_rtx (mode);
! pat = GEN_FCN_3 (icode) (temp, xop0, xop1);
if (pat)
{
/* If PAT is a multi-insn sequence, try to add an appropriate
*************** expand_twoval_binop (binoptab, op0, op1,
*** 1921,1927 ****
|| ! (*insn_data[icode].operand[3].predicate) (targ1, mode))
abort ();
! pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
if (pat)
{
emit_insn (pat);
--- 1921,1927 ----
|| ! (*insn_data[icode].operand[3].predicate) (targ1, mode))
abort ();
! pat = GEN_FCN_4 (icode) (targ0, xop0, xop1, targ1);
if (pat)
{
emit_insn (pat);
*************** expand_unop (mode, unoptab, op0, target,
*** 2025,2031 ****
if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
temp = gen_reg_rtx (mode);
! pat = GEN_FCN (icode) (temp, xop0);
if (pat)
{
if (GET_CODE (pat) == SEQUENCE
--- 2025,2031 ----
if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
temp = gen_reg_rtx (mode);
! pat = GEN_FCN_2 (icode) (temp, xop0);
if (pat)
{
if (GET_CODE (pat) == SEQUENCE
*************** expand_complex_abs (mode, op0, target, u
*** 2386,2392 ****
if (! (*insn_data[icode].operand[0].predicate) (temp, submode))
temp = gen_reg_rtx (submode);
! pat = GEN_FCN (icode) (temp, xop0);
if (pat)
{
if (GET_CODE (pat) == SEQUENCE
--- 2386,2392 ----
if (! (*insn_data[icode].operand[0].predicate) (temp, submode))
temp = gen_reg_rtx (submode);
! pat = GEN_FCN_2 (icode) (temp, xop0);
if (pat)
{
if (GET_CODE (pat) == SEQUENCE
*************** emit_unop_insn (icode, target, op0, code
*** 2552,2558 ****
|| (flag_force_mem && GET_CODE (temp) == MEM))
temp = gen_reg_rtx (GET_MODE (temp));
! pat = GEN_FCN (icode) (temp, op0);
if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN)
add_equal_note (pat, temp, code, op0, NULL_RTX);
--- 2552,2558 ----
|| (flag_force_mem && GET_CODE (temp) == MEM))
temp = gen_reg_rtx (GET_MODE (temp));
! pat = GEN_FCN_2 (icode) (temp, op0);
if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN)
add_equal_note (pat, temp, code, op0, NULL_RTX);
*************** emit_cmp_and_jump_insn_1 (x, y, mode, co
*** 3090,3096 ****
{
x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
! emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
return;
}
}
--- 3090,3096 ----
{
x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
! emit_jump_insn (GEN_FCN_4 (icode) (test, x, y, label));
return;
}
}
*************** emit_cmp_and_jump_insn_1 (x, y, mode, co
*** 3100,3106 ****
if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
{
x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
! emit_insn (GEN_FCN (icode) (x));
if (label)
emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
return;
--- 3100,3106 ----
if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
{
x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
! emit_insn (GEN_FCN_1 (icode) (x));
if (label)
emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
return;
*************** emit_cmp_and_jump_insn_1 (x, y, mode, co
*** 3113,3119 ****
{
x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
! emit_insn (GEN_FCN (icode) (x, y));
if (label)
emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
return;
--- 3113,3119 ----
{
x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
! emit_insn (GEN_FCN_2 (icode) (x, y));
if (label)
emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
return;
*************** emit_conditional_move (target, code, op0
*** 3541,3547 ****
/* This shouldn't happen. */
abort ();
! insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
/* If that failed, then give up. */
if (insn == 0)
--- 3541,3547 ----
/* This shouldn't happen. */
abort ();
! insn = GEN_FCN_4 (icode) (subtarget, comparison, op2, op3);
/* If that failed, then give up. */
if (insn == 0)
*************** gen_add2_insn (x, y)
*** 3598,3604 ****
(y, insn_data[icode].operand[2].mode)))
abort ();
! return (GEN_FCN (icode) (x, x, y));
}
int
--- 3598,3604 ----
(y, insn_data[icode].operand[2].mode)))
abort ();
! return (GEN_FCN_3 (icode) (x, x, y));
}
int
*************** gen_sub2_insn (x, y)
*** 3624,3630 ****
(y, insn_data[icode].operand[2].mode)))
abort ();
! return (GEN_FCN (icode) (x, x, y));
}
int
--- 3624,3630 ----
(y, insn_data[icode].operand[2].mode)))
abort ();
! return (GEN_FCN_3 (icode) (x, x, y));
}
int
*************** gen_move_insn (x, y)
*** 3705,3711 ****
}
insn_code = mov_optab->handlers[(int) tmode].insn_code;
! return (GEN_FCN (insn_code) (x, y));
}
start_sequence ();
--- 3705,3711 ----
}
insn_code = mov_optab->handlers[(int) tmode].insn_code;
! return (GEN_FCN_2 (insn_code) (x, y));
}
start_sequence ();
*************** gen_extend_insn (x, y, mto, mfrom, unsig
*** 3736,3742 ****
enum machine_mode mto, mfrom;
int unsignedp;
{
! return (GEN_FCN (extendtab[(int) mto][(int) mfrom][unsignedp]) (x, y));
}
/* can_fix_p and can_float_p say whether the target machine
--- 3736,3742 ----
enum machine_mode mto, mfrom;
int unsignedp;
{
! return (GEN_FCN_2 (extendtab[(int) mto][(int) mfrom][unsignedp]) (x, y));
}
/* can_fix_p and can_float_p say whether the target machine
Index: regmove.c
===================================================================
RCS file: /cvs/egcs/egcs/gcc/regmove.c,v
retrieving revision 1.69
diff -c -3 -p -r1.69 regmove.c
*** regmove.c 1999/09/20 09:59:51 1.69
--- regmove.c 1999/09/24 17:28:57
*************** gen_add3_insn (r0, r1, c)
*** 98,104 ****
(c, insn_data[icode].operand[2].mode)))
return NULL_RTX;
! return (GEN_FCN (icode) (r0, r1, c));
}
--- 98,104 ----
(c, insn_data[icode].operand[2].mode)))
return NULL_RTX;
! return (GEN_FCN_3 (icode) (r0, r1, c));
}
Index: reload1.c
===================================================================
RCS file: /cvs/egcs/egcs/gcc/reload1.c,v
retrieving revision 1.166
diff -c -3 -p -r1.166 reload1.c
*** reload1.c 1999/09/20 09:59:51 1.166
--- reload1.c 1999/09/24 17:29:02
*************** emit_reload_insns (chain)
*** 7212,7218 ****
or as an intermediate register. */
if (rld[j].secondary_out_icode != CODE_FOR_nothing)
{
! emit_insn ((GEN_FCN (rld[j].secondary_out_icode)
(real_old, second_reloadreg, reloadreg)));
special = 1;
}
--- 7212,7218 ----
or as an intermediate register. */
if (rld[j].secondary_out_icode != CODE_FOR_nothing)
{
! emit_insn ((GEN_FCN_3 (rld[j].secondary_out_icode)
(real_old, second_reloadreg, reloadreg)));
special = 1;
}
*************** emit_reload_insns (chain)
*** 7251,7257 ****
gen_reload (reloadreg, second_reloadreg,
rld[j].opnum, rld[j].when_needed);
! emit_insn ((GEN_FCN (tertiary_icode)
(real_old, reloadreg, third_reloadreg)));
special = 1;
}
--- 7251,7257 ----
gen_reload (reloadreg, second_reloadreg,
rld[j].opnum, rld[j].when_needed);
! emit_insn ((GEN_FCN_3 (tertiary_icode)
(real_old, reloadreg, third_reloadreg)));
special = 1;
}
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