More back-end GC root-registration

[Mark Mitchell]

Here's the dsp16xxx, mn10200, and tahoe bits.  A casual glance over
the various ports suggests that only the ARC, ARM, Thumb, Convex,
M88K, and SH still need work.

--
Mark Mitchell                   mark@codesourcery.com
CodeSourcery, LLC               http://www.codesourcery.com

Tue Sep  7 23:31:53 1999  Mark Mitchell  <mark@codesourcery.com>

	* dsp16xxx.c: Include ggc.h
	(override_options): Mark GC roots.
	* mn10200.c: Include ggc.h.
	(asm_file_start): Mark GC roots.
	* tahoe.c: Include ggc.h.
	(extensible_operand): Mark GC roots.

Index: config/dsp16xx/dsp16xx.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/dsp16xx/dsp16xx.c,v
retrieving revision 1.8
diff -c -p -r1.8 dsp16xx.c
*** dsp16xx.c	1999/09/07 05:48:25	1.8
--- dsp16xx.c	1999/09/08 06:25:37
*************** Boston, MA 02111-1307, USA.  */
*** 35,40 ****
--- 35,41 ----
  #include "expr.h"
  #include "function.h"
  #include "flags.h"
+ #include "ggc.h"
  
  char *text_seg_name;
  char *rsect_text;
*************** override_options ()
*** 1529,1535 ****
--- 1530,1561 ----
  	  flag_inline_functions = 1;
  	}
      }
+ 
+   /* Mark our global variables for GC.  */
+   ggc_add_rtx (&dsp16xx_addhf3_libcall, 1);
+   ggc_add_rtx (dsp16xx_addhf3_libcall, 1);
+   ggc_add_rtx (dsp16xx_subhf3_libcall, 1);
+   ggc_add_rtx (dsp16xx_mulhf3_libcall, 1);
+   ggc_add_rtx (dsp16xx_divhf3_libcall, 1);
+   ggc_add_rtx (dsp16xx_cmphf3_libcall, 1);
+   ggc_add_rtx (dsp16xx_fixhfhi2_libcall, 1);
+   ggc_add_rtx (dsp16xx_floathihf2_libcall, 1);
+   ggc_add_rtx (dsp16xx_neghf2_libcall, 1);
+   ggc_add_rtx (dsp16xx_mulhi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_udivqi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_udivhi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_divqi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_divhi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_modqi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_modhi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_umodqi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_umodhi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_ashrhi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_ashlhi3_libcall, 1);
+   ggc_add_rtx (dsp16xx_ucmphi2_libcall, 1);
+   ggc_add_rtx (dsp16xx_lshrhi3_libcall, 1);
  }
+ 
  
  enum rtx_code
  next_cc_user_code (insn)
Index: config/mn10200/mn10200.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/mn10200/mn10200.c,v
retrieving revision 1.9
diff -c -p -r1.9 mn10200.c
*** mn10200.c	1999/09/07 05:48:48	1.9
--- mn10200.c	1999/09/08 06:25:42
*************** Boston, MA 02111-1307, USA.  */
*** 36,41 ****
--- 36,42 ----
  #include "expr.h"
  #include "function.h"
  #include "obstack.h"
+ #include "ggc.h"
  
  /* Global registers known to hold the value zero.
  
*************** asm_file_start (file)
*** 72,77 ****
--- 73,80 ----
    else
      fprintf (file, "\n\n");
    output_file_directive (file, main_input_filename);
+   ggc_add_rtx (&zero_dreg, 1);
+   ggc_add_rtx (&zero_areg, 1);
  }
  
  /* Print operand X using operand code CODE to assembly language output file
Index: config/tahoe/tahoe.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/tahoe/tahoe.c,v
retrieving revision 1.4
diff -c -p -r1.4 tahoe.c
*** tahoe.c	1999/09/07 05:49:08	1.4
--- tahoe.c	1999/09/08 06:25:42
*************** Boston, MA 02111-1307, USA.  */
*** 35,40 ****
--- 35,41 ----
  #include "function.h"
  #include "output.h"
  #include "insn-attr.h"
+ #include "ggc.h"
  
  /* On tahoe, you have to go to memory to convert a register
     from sub-word to word.  */
*************** extensible_operand (op, mode)
*** 50,57 ****
         || (GET_CODE (op) == SUBREG
  	   && GET_CODE (SUBREG_REG (op)) == REG))
        && tahoe_reg_conversion_loc == 0)
!     tahoe_reg_conversion_loc
!       = assign_stack_local (SImode, GET_MODE_SIZE (SImode));
  
    return general_operand (op, mode);
  }
--- 51,61 ----
         || (GET_CODE (op) == SUBREG
  	   && GET_CODE (SUBREG_REG (op)) == REG))
        && tahoe_reg_conversion_loc == 0)
!     {
!       tahoe_reg_conversion_loc
! 	= assign_stack_local (SImode, GET_MODE_SIZE (SImode));
!       ggc_add_rtx_root (&tahoe_reg_conversion_loc, 1);
!     }
  
    return general_operand (op, mode);
  }