new_ia32_branch HI to Si mode promoting patch

Jan Hubicka hubicka@atrey.karlin.mff.cuni.cz
Thu Jul 22 19:56:00 GMT 1999


Hi
Old i386 backend was promoting HI mode arithmetic to SI mode even with
memory operands when they was known to be aligned.  This seems to be good
idea for me so I've reimplemented this for new backend.

Honza

Thu Jul 22 22:39:06 EDT 1999  Jan Hubicka  <hubicka@freesoft.cz>
	* i386.md (HImode to SImode splitters) Use aligned_operand.
	(movhi patterns): Use non-prefixed mov from memory for aligned_operand.
	* i386.c (aligned_operand): New function.
	(aligned_imm_operand): New function.
	* i386.c (aligned_operand): Declare.
	(aligned_imm_operand): Declare.

*** /root/i386old2/i386.md	Tue Jul 20 02:34:08 1999
--- i386.md	Thu Jul 22 22:18:20 1999
***************
*** 1254,1273 ****
    [(set (attr "type")
       (cond [(and (match_operand:HI 1 "const0_operand" "")
  		 (and (match_operand:HI 0 "register_operand" "")
! 		      (ne (symbol_ref "TARGET_USE_MOV0") (const_int 0))))
  	      (const_string "alu1")
  	    (and (ne (symbol_ref "TARGET_MOVX")
  		     (const_int 0))
! 		 (eq_attr "alternative" "1"))
  	      (const_string "imovx")
  	   ]
  	   (const_string "imov")))
      (set (attr "length_prefix")
        (cond [(eq_attr "type" "imovx")
  	       (const_string "0")
! 	     (and (eq_attr "alternative" "0")
! 		  (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
! 		      (const_int 0)))
  	       (const_string "0")
  	    ]
  	    (const_string "1")))
--- 1326,1347 ----
    [(set (attr "type")
       (cond [(and (match_operand:HI 1 "const0_operand" "")
  		 (and (match_operand:HI 0 "register_operand" "")
! 		      (eq_attr "cpu" "!k6")))
  	      (const_string "alu1")
  	    (and (ne (symbol_ref "TARGET_MOVX")
  		     (const_int 0))
! 		 (and (eq_attr "alternative" "1")
! 		      (not (match_operand 1 "aligned_operand" ""))))
  	      (const_string "imovx")
  	   ]
  	   (const_string "imov")))
      (set (attr "length_prefix")
        (cond [(eq_attr "type" "imovx")
  	       (const_string "0")
! 	     (and (match_operand 1 "aligned_operand" "")
! 		  (and (match_operand 0 "register_operand" "")
! 		       (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
! 			   (const_int 0))))
  	       (const_string "0")
  	    ]
  	    (const_string "1")))
***************
*** 1304,1319 ****
  	      (const_string "imov")
  	    (and (ne (symbol_ref "TARGET_MOVX")
  		     (const_int 0))
! 		 (eq_attr "alternative" "1"))
  	      (const_string "imovx")
  	   ]
  	   (const_string "imov")))
      (set (attr "length_prefix")
        (cond [(eq_attr "type" "imovx")
  	       (const_string "0")
! 	     (and (eq_attr "alternative" "0")
! 		  (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
! 		      (const_int 0)))
  	       (const_string "0")
  	    ]
  	    (const_string "1")))
--- 1378,1395 ----
  	      (const_string "imov")
  	    (and (ne (symbol_ref "TARGET_MOVX")
  		     (const_int 0))
! 		 (and (eq_attr "alternative" "1")
! 		      (not (match_operand 1 "aligned_operand" ""))))
  	      (const_string "imovx")
  	   ]
  	   (const_string "imov")))
      (set (attr "length_prefix")
        (cond [(eq_attr "type" "imovx")
  	       (const_string "0")
! 	     (and (match_operand 1 "aligned_operand" "")
! 		  (and (match_operand 0 "register_operand" "")
! 		       (eq (symbol_ref "TARGET_PARTIAL_REG_STALL")
! 			   (const_int 0))))
  	       (const_string "0")
  	    ]
  	    (const_string "1")))
***************
*** 3204,3210 ****
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(plus:HI (match_operand:HI 1 "register_operand" "")
! 		 (match_operand:HI 2 "nonmemory_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))
--- 3319,3325 ----
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(plus:HI (match_operand:HI 1 "register_operand" "")
! 		 (match_operand:HI 2 "aligned_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))
***************
*** 4262,4268 ****
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(and:HI (match_operand:HI 1 "register_operand" "")
! 		(match_operand:HI 2 "nonmemory_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (and:SI (match_dup 1) (match_dup 2)))
--- 4516,4522 ----
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(and:HI (match_operand:HI 1 "register_operand" "")
! 		(match_operand:HI 2 "aligned_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (and:SI (match_dup 1) (match_dup 2)))
***************
*** 4285,4291 ****
  (define_split
    [(set (reg:CCNO 17)
  	(compare:CCNO (and:HI (match_operand:HI 1 "register_operand" "")
! 			      (match_operand:HI 2 "immediate_operand" ""))
  		      (const_int 0)))
     (set (match_operand:HI 0 "register_operand" "")
  	(and:HI (match_dup 1) (match_dup 2)))]
--- 4539,4545 ----
  (define_split
    [(set (reg:CCNO 17)
  	(compare:CCNO (and:HI (match_operand:HI 1 "register_operand" "")
! 			      (match_operand:HI 2 "aligned_operand" ""))
  		      (const_int 0)))
     (set (match_operand:HI 0 "register_operand" "")
  	(and:HI (match_dup 1) (match_dup 2)))]
***************
*** 4467,4473 ****
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(ior:HI (match_operand:HI 1 "register_operand" "")
! 		(match_operand:HI 2 "nonmemory_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (ior:SI (match_dup 1) (match_dup 2)))
--- 4737,4743 ----
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(ior:HI (match_operand:HI 1 "register_operand" "")
! 		(match_operand:HI 2 "aligned_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (ior:SI (match_dup 1) (match_dup 2)))
***************
*** 4572,4578 ****
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(xor:HI (match_operand:HI 1 "register_operand" "")
! 		(match_operand:HI 2 "nonmemory_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (xor:SI (match_dup 1) (match_dup 2)))
--- 4854,4860 ----
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(xor:HI (match_operand:HI 1 "register_operand" "")
! 		(match_operand:HI 2 "aligned_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (xor:SI (match_dup 1) (match_dup 2)))
***************
*** 5214,5223 ****
  	   ]
  	   (const_string "ishift")))])
  
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(ashift:HI (match_operand:HI 1 "register_operand" "")
! 		   (match_operand:QI 2 "nonmemory_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))
--- 5572,5582 ----
  	   ]
  	   (const_string "ishift")))])
  
  (define_split
    [(set (match_operand:HI 0 "register_operand" "")
  	(ashift:HI (match_operand:HI 1 "register_operand" "")
! 		   (match_operand:QI 2 "aligned_operand" "")))
     (clobber (reg:CC 17))]
    "! TARGET_PARTIAL_REG_STALL && reload_completed"
    [(parallel [(set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))
***************
*** 5241,5247 ****
      case TYPE_ALU:
        if (operands[2] != const1_rtx)
  	abort ();
!       return \"add{w}\\t{%0, %0|%0, %0}\";
  
      default:
        if (REG_P (operands[2]))
--- 5612,5618 ----
      case TYPE_ALU:
        if (operands[2] != const1_rtx)
  	abort ();
!       return \"#\";
  
      default:
        if (REG_P (operands[2]))
***************
*** 7931,7937 ****
  
  (define_peephole2
    [(set (reg:CCNO 17)
! 	(compare:CCNO (and:HI (match_operand:HI 0 "register_operand" "")
  			      (match_operand:HI 1 "immediate_operand" ""))
  		      (const_int 0)))]
    "! TARGET_PARTIAL_REG_STALL
--- 8375,8381 ----
  
  (define_peephole2
    [(set (reg:CCNO 17)
! 	(compare:CCNO (and:HI (match_operand:HI 0 "aligned_operand" "")
  			      (match_operand:HI 1 "immediate_operand" ""))
  		      (const_int 0)))]
    "! TARGET_PARTIAL_REG_STALL
***************
*** 7949,7955 ****
  
  (define_peephole2
    [(set (reg:CCNO 17)
! 	(compare:CCNO (and:QI (match_operand:QI 0 "register_operand" "")
  			      (match_operand:QI 1 "immediate_operand" ""))
  		      (const_int 0)))]
    "! TARGET_PARTIAL_REG_STALL
--- 8393,8399 ----
  
  (define_peephole2
    [(set (reg:CCNO 17)
! 	(compare:CCNO (and:QI (match_operand:QI 0 "aligned_operand" "")
  			      (match_operand:QI 1 "immediate_operand" ""))
  		      (const_int 0)))]
    "! TARGET_PARTIAL_REG_STALL
*** /root/i386old2/i386.c	Tue Jul 20 02:32:34 1999
--- i386.c	Thu Jul 22 22:15:48 1999
*************** long_memory_operand (op, mode)
*** 1221,1226 ****
--- 1310,1340 ----
  
    return memory_address_length (op) != 0;
  }
+ /* Returns 1 for operands that can be safely promoted from HI mode to SI mode
+    when read from memory.  */
+ int
+ aligned_operand (op, mode)
+      rtx op;
+      enum machine_mode mode;
+ {
+ 	if (nonmemory_operand (op, mode)) return 1;
+ 	/* Avoid matching with weird memory references.  */
+ 	if (!memory_operand (op, mode)) return 0;
+ 	return ix86_aligned_p (op);
+ }
+ /* Returns 1 for operands that can be safely promoted from HI mode to SI mode
+    when read from memory. Return 0 for immediates  */
+ int
+ aligned_nonimm_operand (op, mode)
+      rtx op;
+      enum machine_mode mode;
+ {
+ 	if (immediate_operand (op, mode)) return 1;
+ 	if (nonmemory_operand (op, mode)) return 1;
+ 	/* Avoid matching with weird memory references.  */
+ 	if (!memory_operand (op, mode)) return 0;
+ 	return ix86_aligned_p (op);
+ }
  
  /* Return true if the constant is something that can be loaded with
     a special instruction.  Only handle 0.0 and 1.0; others are less
*** /root/i386old2/i386.h	Tue Jul 20 02:32:34 1999
--- i386.h	Thu Jul 22 22:15:48 1999
*************** do { long l;						\
*** 2395,2402 ****
  				 UDIV, UMOD, ASHIFT, ROTATE, ASHIFTRT,	\
  				 LSHIFTRT, ROTATERT}},			\
    {"memory_displacement_operand", {MEM}},				\
    {"cmpsi_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,	\
  		     LABEL_REF, SUBREG, REG, MEM, AND}},
  
  /* Functions in i386.c */
  
--- 2404,2411 ----
  				 UDIV, UMOD, ASHIFT, ROTATE, ASHIFTRT,	\
  				 LSHIFTRT, ROTATERT}},			\
    {"memory_displacement_operand", {MEM}},				\
    {"cmpsi_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,	\
  		     LABEL_REF, SUBREG, REG, MEM, AND}},
+   {"aligned_operand", {MEM, REG, SUBREG, CONST_INT}},			\
+   {"aligned_nonimm_operand", {MEM, REG, SUBREG}},			\
  
  /* Functions in i386.c */
  
*************** extern int mult_operator XPARAMS((xrtx, 
*** 2443,2449 ****
  extern int div_operator XPARAMS((xrtx, xmode));
  extern int arith_or_logical_operator XPARAMS((xrtx, xmode));
  extern int memory_displacement_operand XPARAMS((xrtx, xmode));
  extern int cmpsi_operand XPARAMS((xrtx, xmode));
  
  extern int standard_80387_constant_p XPARAMS((xrtx));
  extern int symbolic_reference_mentioned_p XPARAMS((xrtx));
--- 2453,2462 ----
  extern int div_operator XPARAMS((xrtx, xmode));
  extern int arith_or_logical_operator XPARAMS((xrtx, xmode));
  extern int memory_displacement_operand XPARAMS((xrtx, xmode));
  extern int cmpsi_operand XPARAMS((xrtx, xmode));
+ extern int long_memory_operand XPARAMS((xrtx, xmode));
+ extern int aligned_operand XPARAMS((xrtx, xmode));
+ extern int aligned_nonimm_operand XPARAMS((xrtx, xmode));
  
  extern int standard_80387_constant_p XPARAMS((xrtx));
  extern int symbolic_reference_mentioned_p XPARAMS((xrtx));


More information about the Gcc-patches mailing list