m68k coldfire fix

Jeffrey A Law law@cygnus.com
Thu Jan 21 22:34:00 GMT 1999


The coldfire does not have rot #8,dN instructions.  This patch should keep
gcc from generating them.  The other similar patterns already avoided
generating the problem rotate patterns in for the coldfire.  Someone just
missed a case.

       * m68k.md (ashldi_const): Disable for !TARGET_5200.  Fix indention.
       (ashldi3 expander): Similarly.  Update comments.
       (ashrdi_const, lshrdi_const): Fix indention.
       (ashrdi3, lshrdi3): FIx indention.  Update comments.


Index: m68k.md
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/m68k/m68k.md,v
retrieving revision 1.24
diff -c -3 -p -r1.24 m68k.md
*** m68k.md	1998/12/31 00:13:53	1.24
--- m68k.md	1999/01/22 06:21:33
***************
*** 4563,4571 ****
    [(set (match_operand:DI 0 "general_operand" "=d")
  	(ashift:DI (match_operand:DI 1 "general_operand" "0")
  		     (match_operand 2 "const_int_operand" "n")))]
!   "((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
!     || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
!     || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))"
    "*
  {
    operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
--- 4563,4572 ----
    [(set (match_operand:DI 0 "general_operand" "=d")
  	(ashift:DI (match_operand:DI 1 "general_operand" "0")
  		     (match_operand 2 "const_int_operand" "n")))]
!   "(!TARGET_5200
!     && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
! 	|| INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
! 	|| (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63)))"
    "*
  {
    operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
***************
*** 4594,4606 ****
    [(set (match_operand:DI 0 "general_operand" "")
  	(ashift:DI (match_operand:DI 1 "general_operand" "")
  		     (match_operand 2 "const_int_operand" "")))]
!   ""
    "
  {
    if (GET_CODE (operands[2]) != CONST_INT
!   || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3)
!      && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16
!      && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63)))
      FAIL;
  } ")
  
--- 4595,4609 ----
    [(set (match_operand:DI 0 "general_operand" "")
  	(ashift:DI (match_operand:DI 1 "general_operand" "")
  		     (match_operand 2 "const_int_operand" "")))]
!   "!TARGET_5200"
    "
  {
+   /* ???  This is a named pattern like this is not allowed to FAIL based
+      on its operands.  */
    if (GET_CODE (operands[2]) != CONST_INT
!       || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3)
! 	  && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16
! 	  && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63)))
      FAIL;
  } ")
  
***************
*** 4763,4773 ****
    [(set (match_operand:DI 0 "general_operand" "=d")
  	(ashiftrt:DI (match_operand:DI 1 "general_operand" "0")
  		     (match_operand 2 "const_int_operand" "n")))]
!   "!TARGET_5200 
      && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
!     || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
!     || INTVAL (operands[2]) == 31
!     || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))"
    "*
  {
    operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
--- 4766,4776 ----
    [(set (match_operand:DI 0 "general_operand" "=d")
  	(ashiftrt:DI (match_operand:DI 1 "general_operand" "0")
  		     (match_operand 2 "const_int_operand" "n")))]
!   "(!TARGET_5200 
      && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
! 	|| INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
! 	|| INTVAL (operands[2]) == 31
! 	|| (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63)))"
    "*
  {
    operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
***************
*** 4806,4815 ****
    "!TARGET_5200"
    "
  {
    if (GET_CODE (operands[2]) != CONST_INT
!   || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3)
!      && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16
!      && (INTVAL (operands[2]) < 31 || INTVAL (operands[2]) > 63)))
      FAIL;
  } ")
  
--- 4809,4820 ----
    "!TARGET_5200"
    "
  {
+   /* ???  This is a named pattern like this is not allowed to FAIL based
+      on its operands.  */
    if (GET_CODE (operands[2]) != CONST_INT
!       || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3)
! 	  && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16
! 	  && (INTVAL (operands[2]) < 31 || INTVAL (operands[2]) > 63)))
      FAIL;
  } ")
  
***************
*** 4934,4943 ****
    [(set (match_operand:DI 0 "general_operand" "=d")
  	(lshiftrt:DI (match_operand:DI 1 "general_operand" "0")
  		     (match_operand 2 "const_int_operand" "n")))]
!   "!TARGET_5200
      && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
!     || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
!     || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))"
    "*
  {
    operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
--- 4939,4948 ----
    [(set (match_operand:DI 0 "general_operand" "=d")
  	(lshiftrt:DI (match_operand:DI 1 "general_operand" "0")
  		     (match_operand 2 "const_int_operand" "n")))]
!   "(!TARGET_5200
      && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
! 	 || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
! 	 || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63)))"
    "*
  {
    operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
***************
*** 4972,4981 ****
    "!TARGET_5200"
    "
  {
    if (GET_CODE (operands[2]) != CONST_INT
!   || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3)
!      && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16
!      && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63)))
      FAIL;
  } ")
  
--- 4977,4988 ----
    "!TARGET_5200"
    "
  {
+   /* ???  This is a named pattern like this is not allowed to FAIL based
+      on its operands.  */
    if (GET_CODE (operands[2]) != CONST_INT
!       || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3)
! 	  && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16
! 	  && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63)))
      FAIL;
  } ")
  



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